component
TLP2761
Public Made by Adomby adom
TOSHIBA Logic Output Optoisolators, SO-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 10d ago |
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| page.json | 10d ago |
| README.md | 10d ago |
| tlp2761-etched.glb | 10d ago |
| tlp2761-etched.step | 10d ago |
| tlp2761-hero.glb | 10d ago |
| tlp2761-hero.overlay.json | 10d ago |
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TLP2761
TOSHIBA · Logic Output Optoisolators · SO-6
TLP2761 from TOSHIBA, in a SO-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Anode | passive | Anode of the input GaAlAs infrared LED, which is driven with an input forward current IF that must not exceed the absolute maximum of 10 mA. |
| 2 | N.C. | unconnected | Not connected internally; the datasheet labels this pin N.C. and gives no electrical function for it. |
| 3 | Cathode | passive | Cathode of the input GaAlAs infrared LED, which is the return path for the input LED current. |
| 4 | GND | power_in | Ground reference for the detector IC; a 0.1 µF ceramic bypass capacitor must be connected between pin 6 and pin 4, placed within 1 cm of each pin. |
| 5 | VO | output | Totem-pole logic output of the detector, with a low-level output voltage of 0.4 V max at IO = 3.2 mA (VCC = 2.7 to 5.5 V). |
| 6 | VCC | power_in | Detector supply pin operating from 2.7 V to 5.5 V, which requires a 0.1 µF bypass capacitor to pin 4. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SO-6 |
| Category | Optoisolators |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input forward voltage | VF | 1.35 | 1.5 | 1.65 | V | IF = 2 mA, Ta = 25 °C | 4 |
| Input reverse current | IR | 10 | µA | VR = 5 V, Ta = 25 °C | 4 | ||
| Low-level output voltage | VOL | 0.1 | V | IF = 2 mA, IO = 20 µA | 4 | ||
| Low-level output voltage | VOL | 0.4 | V | IF = 2 mA, IO = 3.2 mA | 4 | ||
| High-level output voltage | VOH | 3.2 | 3.29 | V | IO = -20 µA, VF = 0.8 V, VCC = 3.3 V | 4 | |
| High-level output voltage | VOH | 4.9 | 4.99 | V | IO = -20 µA, VF = 0.8 V, VCC = 5 V | 4 | |
| High-level output voltage | VOH | 2.3 | 3.15 | V | IO = -3.2 mA, VF = 0.8 V, VCC = 3.3 V | 4 | |
| High-level output voltage | VOH | 4 | 4.87 | V | IO = -3.2 mA, VF = 0.8 V, VCC = 5 V | 4 | |
| Low-level supply current | ICCL | 0.65 | 1 | mA | IF = 2 mA | 4 | |
| High-level supply current | ICCH | 0.65 | 1 | mA | IF = 0 mA | 4 | |
| Threshold input current (H/L) | IFHL | 1.3 | mA | IO = 3.2 mA, VO < 0.4 V, Ta = -40 to 105 °C | 4 | ||
| Threshold input current (H/L) | IFHL | 1.6 | mA | IO = 3.2 mA, VO < 0.4 V, Ta = -40 to 125 °C | 4 | ||
| Supply voltage | VCC | 2.7 | 5.5 | V | 4 | ||
| Input off-state voltage | VF(OFF) | 0.8 | V | 4 | |||
| Operating temperature | Topr | -40 | 125 | °C | 4 | ||
| Operating temperature | Topr | -40 | 125 | °C | Ta = 25 °C unless otherwise specified | 3 | |
| Storage temperature | Tstg | -55 | 125 | °C | 3 | ||
| Lead soldering temperature | Tsol | 260 | °C | 10 s | 3 | ||
| Input forward current | IF | 10 | mA | Ta = 25 °C unless otherwise specified | 3 | ||
| Input forward current derating | ΔIF/ΔTa | -0.13 | mA/°C | Ta ≥ 110 °C | 3 | ||
| Input forward current (pulsed) | IFP | 40 | mA | PW ≤ 1 ms, duty = 50% | 3 | ||
| Input forward current (pulsed) derating | ΔIFP/ΔTa | -1.01 | mA/°C | Ta ≥ 110 °C | 3 | ||
| Total capacitance (input to output) | CS | 0.4 | pF | VS = 0 V, f = 1 MHz | 4 | ||
| Isolation voltage | BVS | 5000 | Vrms | AC, 60 s | 4 | ||
| Isolation voltage | BVS | 10000 | Vrms | AC, 1 s in oil | 4 | ||
| Isolation voltage | BVS | 10000 | Vdc | DC, 60 s in oil | 4 | ||
| Propagation delay time (H/L) | tpHL | 80 | ns | IF = 0 → 2 mA, RT = 1.68 kΩ, CL = 15 pF | 5 | ||
| Propagation delay time (L/H) | tpLH | 80 | ns | IF = 2 → 0 mA, RT = 1.68 kΩ, CL = 15 pF | 5 | ||
| Pulse width distortion | /tpHL-tpLH/ | 25 | ns | IF = 2 mA, RT = 1.68 kΩ, CL = 15 pF | 5 | ||
| Propagation delay skew (device to device) | tpsk | 30 | ns | IF = 2 mA, RT = 1.68 kΩ, CL = 15 pF | 5 | ||
| Common-mode transient immunity at output high | CMH | 20 | 25 | kV/µs | VCM = 1000 Vp-p, IF = 0 mA, VCC = 3.3 V / 5 V, Ta = 25 °C, RT = 1.68 kΩ | 5 | |
| Common-mode transient immunity at output low | CML | 20 | 25 | kV/µs | VCM = 1000 Vp-p, IF = 2 mA, VCC = 3.3 V / 5 V, Ta = 25 °C, RT = 1.68 kΩ | 5 | |
| Input forward voltage temperature coefficient | ΔVF/ΔTa | -2 | mV/°C | IF = 2 mA | 4 | ||
| Input capacitance | Ct | 20 | pF | V = 0 V, f = 1 MHz, Ta = 25 °C | 4 |
CAD (KiCad official)
- Symbol:
TLP2761 - Footprint:
Package_SO:SO-6_4.4x3.6mm_P1.27mm - 3D model: SO-6 (KiCad packages3D, STEP)
- 3D model files:
tlp2761-etched.step/tlp2761-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlp2761.step/tlp2761.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (21 pp, sha256
9a792626d3447703, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).