component
TLK1501IRCPR
Public Made by Adomby adom
Texas Instruments Ethernet Transceivers, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "tlk1501ircpr",
"title": "TLK1501IRCPR",
"brief": "Texas Instruments Ethernet Transceivers, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"tlk1501ircpr",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "TLK1501IRCPR",
"manufacturer": "Texas Instruments",
"package": "LQFP-64(10x10)",
"pin_count": 64,
"category": "Interface",
"subcategory": "Ethernet Transceivers",
"datasheet": "https://www.ti.com/cn/lit/gpn/tlk1501",
"parts": {
"symbol": "tlk1501ircpr.kicad_sym",
"footprint": "tlk1501ircpr.kicad_mod",
"model_3d": "tlk1501ircpr-hero.glb",
"model_3d_plain": "tlk1501ircpr.glb",
"model_3d_step": "tlk1501ircpr-etched.step",
"model_3d_step_plain": "tlk1501ircpr.step",
"lbr": "tlk1501ircpr.lbr"
},
"distributor_links": {
"lcsc": "C527512",
"digikey": "296-26775-2-ND",
"mouser": "595-TLK1501IRCPR"
},
"distributor_check": {
"checked_at": "2026-10-08T01:56:00Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-26775-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-TLK1501IRCPR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VDD",
"type": "power_in",
"description": "Digital logic power supply for all digital circuitry and digital I/O buffers; the device uses a 2.5-V supply with 3-V compatible I/O."
},
{
"number": "2",
"name": "TXD3",
"type": "input",
"description": "Transmit data bus bit 3, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "3",
"name": "TXD4",
"type": "input",
"description": "Transmit data bus bit 4, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "4",
"name": "TXD5",
"type": "input",
"description": "Transmit data bus bit 5, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Digital logic ground providing the return for logic circuits and digital I/O buffers."
},
{
"number": "6",
"name": "TXD6",
"type": "input",
"description": "Transmit data bus bit 6, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "7",
"name": "TXD7",
"type": "input",
"description": "Transmit data bus bit 7, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "8",
"name": "GTX_CLK",
"type": "input",
"description": "Continuous reference clock input in the 30 MHz to 75 MHz range whose rising edge registers TXD, TX_EN and TX_ER for serialization."
},
{
"number": "9",
"name": "VDD",
"type": "power_in",
"description": "Digital logic power supply for all digital circuitry and digital I/O buffers."
},
{
"number": "10",
"name": "TXD8",
"type": "input",
"description": "Transmit data bus bit 8, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "11",
"name": "TXD9",
"type": "input",
"description": "Transmit data bus bit 9, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "12",
"name": "TXD10",
"type": "input",
"description": "Transmit data bus bit 10, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "13",
"name": "GND",
"type": "power_in",
"description": "Digital logic ground providing the return for logic circuits and digital I/O buffers."
},
{
"number": "14",
"name": "TXD11",
"type": "input",
"description": "Transmit data bus bit 11, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "15",
"name": "TXD12",
"type": "input",
"description": "Transmit data bus bit 12, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "16",
"name": "TXD13",
"type": "input",
"description": "Transmit data bus bit 13, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "17",
"name": "TXD14",
"type": "input",
"description": "Transmit data bus bit 14, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "18",
"name": "GND",
"type": "power_in",
"description": "Digital logic ground providing the return for logic circuits and digital I/O buffers."
},
{
"number": "19",
"name": "TXD15",
"type": "input",
"description": "Transmit data bus bit 15, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "20",
"name": "TX_EN",
"type": "input",
"description": "Transmit enable with internal pulldown that must be high with the first preamble word and negated before the first GTX_CLK rising edge after the final word of a frame."
},
{
"number": "21",
"name": "LOOPEN",
"type": "input",
"description": "Loop enable with internal pulldown; when high it routes transmit data internally to the receiver and holds DOUTTXP/DOUTTXN high-impedance, and it must be held low in normal operation."
},
{
"number": "22",
"name": "TX_ER",
"type": "input",
"description": "Transmit error coding with internal pulldown; when high together with TX_EN it flags an error in the frame being transferred."
},
{
"number": "23",
"name": "VDD",
"type": "power_in",
"description": "Digital logic power supply for all digital circuitry and digital I/O buffers."
},
{
"number": "24",
"name": "ENABLE",
"type": "input",
"description": "Device enable with pullup; holding it low places the device in power-down mode with only the serial receive signal detect active, and asserting it high while powered down triggers power-on reset."
},
{
"number": "25",
"name": "LCKREFN",
"type": "input",
"description": "Lock-to-reference input with pullup; when low the receiver clock is frequency locked to GTX_CLK, the device is transmit-only, and RXD[0:15], RX_CLK, RX_ER and RX_DV/LOS go high-impedance."
},
{
"number": "26",
"name": "PRBSEN",
"type": "input",
"description": "PRBS test enable with internal pulldown; when high, PRBS test results are monitored on RX_ER/PRBS_PASS, where high indicates valid PRBS is being received."
},
{
"number": "27",
"name": "TESTEN",
"type": "input",
"description": "Test mode enable with internal pulldown that should be left unconnected or tied low."
},
{
"number": "28",
"name": "GND",
"type": "power_in",
"description": "Digital logic ground providing the return for logic circuits and digital I/O buffers."
},
{
"number": "29",
"name": "RX_ER/PRBS_PASS",
"type": "output",
"description": "Receive error output when PRBSEN is low (asserted during data errors and carrier extension), or PRBS pass status when PRBSEN is high (high = pass); high-impedance during power-on reset."
},
{
"number": "30",
"name": "RX_DV/LOS",
"type": "output",
"description": "Receive data valid output asserted across each recovered frame, and asserted high with RX_ER and the receive data bus as a loss-of-signal indication when the serial receive differential amplitude falls below 200 mV; high-impedance during power-on reset."
},
{
"number": "31",
"name": "RXD15",
"type": "output",
"description": "Receive data bus bit 15, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "32",
"name": "RXD14",
"type": "output",
"description": "Receive data bus bit 14, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "33",
"name": "GND",
"type": "power_in",
"description": "Digital logic ground providing the return for logic circuits and digital I/O buffers."
},
{
"number": "34",
"name": "RXD13",
"type": "output",
"description": "Receive data bus bit 13, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "35",
"name": "RXD12",
"type": "output",
"description": "Receive data bus bit 12, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "36",
"name": "RXD11",
"type": "output",
"description": "Receive data bus bit 11, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "37",
"name": "RXD10",
"type": "output",
"description": "Receive data bus bit 10, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "38",
"name": "VDD",
"type": "power_in",
"description": "Digital logic power supply for all digital circuitry and digital I/O buffers."
},
{
"number": "39",
"name": "RXD9",
"type": "output",
"description": "Receive data bus bit 9, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "40",
"name": "RXD8",
"type": "output",
"description": "Receive data bus bit 8, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "41",
"name": "RX_CLK",
"type": "output",
"description": "Recovered clock output at the serial data rate divided by 20, synchronized to RXD, RX_ER and RX_DV/LOS, held low during power-on reset."
},
{
"number": "42",
"name": "RXD7",
"type": "output",
"description": "Receive data bus bit 7, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "43",
"name": "GND",
"type": "power_in",
"description": "Digital logic ground providing the return for logic circuits and digital I/O buffers."
},
{
"number": "44",
"name": "RXD6",
"type": "output",
"description": "Receive data bus bit 6, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "45",
"name": "RXD5",
"type": "output",
"description": "Receive data bus bit 5, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "46",
"name": "RXD4",
"type": "output",
"description": "Receive data bus bit 4, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "47",
"name": "RXD3",
"type": "output",
"description": "Receive data bus bit 3, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "48",
"name": "VDD",
"type": "power_in",
"description": "Digital logic power supply for all digital circuitry and digital I/O buffers."
},
{
"number": "49",
"name": "RXD2",
"type": "output",
"description": "Receive data bus bit 2, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "50",
"name": "RXD1",
"type": "output",
"description": "Receive data bus bit 1, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "51",
"name": "RXD0",
"type": "output",
"description": "Receive data bus bit 0, 16-bit parallel output synchronized to RX_CLK and valid on its rising edge; high-impedance during power-on reset."
},
{
"number": "52",
"name": "GNDA",
"type": "power_in",
"description": "Analog ground providing the reference for the high-speed RX and TX analog circuits."
},
{
"number": "53",
"name": "DINRXN",
"type": "input",
"description": "Negative side of the differential serial receive input from a copper or optical interface module, used together with DINRXP."
},
{
"number": "54",
"name": "DINRXP",
"type": "input",
"description": "Positive side of the differential serial receive input from a copper or optical interface module, used together with DINRXN."
},
{
"number": "55",
"name": "VDDA",
"type": "power_in",
"description": "Analog power supply reference for the high-speed receiver and transmitter circuits."
},
{
"number": "56",
"name": "RREF",
"type": "input",
"description": "Connection for an external reference resistor returned to analog VDD, which sets an accurate current reference for the transmitter circuitry."
},
{
"number": "57",
"name": "VDDA",
"type": "power_in",
"description": "Analog power supply reference for the high-speed receiver and transmitter circuits."
},
{
"number": "58",
"name": "GNDA",
"type": "power_in",
"description": "Analog ground providing the reference for the high-speed RX and TX analog circuits."
},
{
"number": "59",
"name": "DOUTTXN",
"type": "output",
"description": "Negative side of the differential serial transmit output carrying NRZ data at 20 times GTX_CLK; high-impedance on power-up and while LOOPEN is high."
},
{
"number": "60",
"name": "DOUTTXP",
"type": "output",
"description": "Positive side of the differential serial transmit output carrying NRZ data at 20 times GTX_CLK; high-impedance on power-up and while LOOPEN is high."
},
{
"number": "61",
"name": "GNDA",
"type": "power_in",
"description": "Analog ground providing the reference for the high-speed RX and TX analog circuits."
},
{
"number": "62",
"name": "TXD0",
"type": "input",
"description": "Transmit data bus bit 0 (LSB, transmitted first), one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "63",
"name": "TXD1",
"type": "input",
"description": "Transmit data bus bit 1, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
},
{
"number": "64",
"name": "TXD2",
"type": "input",
"description": "Transmit data bus bit 2, one of 16 single-ended TTL parallel data inputs clocked in on the rising edge of GTX_CLK."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package mismatch: the hint says LQFP-64 (10x10), but the datasheet describes a 64-pin VQFP/PowerPAD ; The pin-to-number map was taken from the garbled top-view figure on page 3 and checked against the T; The exposed PowerPAD on the package bottom has no pin number in the supplied text and is not listed."
],
"pages_sent": 10,
"cost_usd": 0.1038,
"at": "2026-10-08T01:55:33"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tlk1501",
"pages": 34,
"sha256": "9ca14157aaacc1b3",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 64,
"described": 64,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint": "viewers/footprint.html"
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tlk1501ircpr-etched.step",
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"zmin_mm": 0,
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"footprint_binding": "identity",
"sha256": "c5e71b2f9117a9376cce83af7a36c9de04bb5a29fa4138c7203c655094f74d7c",
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}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "LQFP-64(10x10)",
"Category": "Interface",
"Pins": "64"
}
},
"variants": [],
"sections": [
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"info"
],
"discovery_triggers": [
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],
"discovery_pitch": "TLK1501IRCPR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
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