TLE9263BQXXUMA1

Infineon Technologies · Interface - Specialized · VQFN-48-EP(7x7)

TLE9263BQXXUMA1 from Infineon Technologies, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground; all GND pins and the cooling tab must be connected to one common GND potential.
2	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
3	VCC3REF	passive	Collector connection for the external PNP and reference input of voltage regulator 3; absolute maximum -0.3 V to 28 V (40 V load dump, max 400 ms).
4	VCC3B	output	Base connection for the external PNP; absolute maximum -0.3 V to VS + 10 V (40 V load dump, max 400 ms).
5	VCC3SH	passive	Emitter connection for the external PNP, shunt connection; absolute maximum VS - 0.3 V to VS + 0.3 V.
6	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
7	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
8	HS1	output	High-side output 1, typ. 7 Ω, supplied from VSHS; leave open if unused.
9	HS2	output	High-side output 2, typ. 7 Ω, supplied from VSHS; leave open if unused.
10	HS3	output	High-side output 3, typ. 7 Ω, supplied from VSHS; leave open if unused.
11	HS4	output	High-side output 4, typ. 7 Ω, supplied from VSHS; leave open if unused.
12	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
13	VSHS	power_in	Supply for the high-side switches, LIN and GPIO1/2 in HS configuration; connect to battery via reverse protection diode and EMC filter, or to VS if no separate supply is needed; absolute maximum 28 V (40 V load dump, max 400 ms).
14	VS	power_in	Supply for chip internal supply and voltage regulators; connect to battery via external reverse protection diode and EMC filter; absolute maximum 28 V (40 V load dump, max 400 ms).
15	VS	power_in	Supply for chip internal supply and voltage regulators; connect to battery via external reverse protection diode and EMC filter; absolute maximum 28 V (40 V load dump, max 400 ms).
16	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
17	VCC1	power_out	Voltage regulator 1 output (5 V up to 250 mA, 3.3 V variant available); absolute maximum 5.5 V.
18	VCC2	power_out	Voltage regulator 2 output (5 V up to 100 mA, with off-board usage protection); leave open and disabled if unused.
19	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
20	GND	power_in	Ground; all GND pins and the cooling tab must be connected to one common GND potential.
21	FO1	output	Fail output 1; absolute maximum -0.3 V to 40 V; leave open if unused.
22	WK1	input	Wake input 1, absolute maximum -0.3 V to 40 V; alternative function is HV-measurement input (only in combination with WK2).
23	WK2	input	Wake input 2, absolute maximum -0.3 V to 40 V; alternative function is HV-measurement output (only in combination with WK1).
24	WK3	input	Wake input 3, absolute maximum -0.3 V to 40 V; connect to GND and disable via SPI if unused.
25	TXDLIN2	input	Transmit data input for LIN2; logic level referenced to VCC1 (max VCC1 + 0.3 V).
26	RXDLIN2	output	Receive data output for LIN2; logic level referenced to VCC1 (max VCC1 + 0.3 V).
27	CLK	input	SPI clock input.
28	SDI	input	SPI data input into the SBC (MOSI).
29	SDO	output	SPI data output from the SBC (MISO).
30	CSN	input	SPI chip select not input (active low).
31	INT	output	Active-low interrupt output used as wake-up flag in SBC Stop or Normal Mode and for indicating failures; at start-up an external pull-up sets config 1/3, no external pull-up sets config 2/4.
32	RO	output	Reset output.
33	TXDLIN1	input	Transmit data input for LIN1; logic level referenced to VCC1 (max VCC1 + 0.3 V).
34	RXDLIN1	output	Receive data output for LIN1; logic level referenced to VCC1 (max VCC1 + 0.3 V).
35	TXDCAN	input	Transmit data input for CAN; logic level referenced to VCC1 (max VCC1 + 0.3 V).
36	RXDCAN	output	Receive data output for CAN; logic level referenced to VCC1 (max VCC1 + 0.3 V).
37	VCAN	power_in	Supply input for the internal HS-CAN cell; absolute maximum -0.3 V to 5.5 V; connect to VCC1 if CAN is unused.
38	GND	power_in	Ground; all GND pins and the cooling tab must be connected to one common GND potential.
39	CANL	bidirectional	CAN low bus pin; absolute maximum -27 V to 40 V.
40	CANH	bidirectional	CAN high bus pin; absolute maximum -27 V to 40 V.
41	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
42	LIN1	bidirectional	LIN1 bus line according to LIN 2.2/ISO 17987-4 and SAE J2602-2; absolute maximum -27 V to 40 V.
43	GND	power_in	Ground; all GND pins and the cooling tab must be connected to one common GND potential.
44	LIN2	bidirectional	LIN2 bus line according to LIN 2.2/ISO 17987-4 and SAE J2602-2; absolute maximum -27 V to 40 V.
45	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
46	n.c.	unconnected	Not connected, internally not bonded; datasheet hints say to connect to GND.
47	FO2	bidirectional	Fail output 2 (side indicator, 1.25 Hz 50% duty, open drain, active low); alternatively GPIO1 configurable as WK, LS or HS supplied by VSHS; absolute maximum -0.3 V to VS + 0.3 V.
48	FO3/TEST	bidirectional	Fail output 3 (break/rear light, 100 Hz 20% duty, open drain, active low) or GPIO2; as TEST, connect to GND to activate SBC Development Mode, integrated pull-up, connect to VS via pull-up or leave open for normal operation.
49	GND	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Infineon Technologies
Package	VQFN-48-EP(7x7)
Category	Interface ICs
Pins	49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage (VS, VSHS)	VSx,max	-0.3		28	V		14
Supply Voltage (VS, VSHS) load dump	VSx,max	-0.3		40	V	Load Dump, max. 400 ms	14
Voltage Regulator 1	VCC1,max	-0.3		5.5	V	VCC1 = 5.6V for max. 10s	14
Voltage Regulator 2	VCC2,max	-0.3		28	V	VCC2 = 40V for Load Dump, max. 400 ms	14
Voltage Regulator 3 (VCC3REF)	VCC3REF,max	-0.3		28	V	VCC3REF = 40V for Load Dump, max. 400 ms	14
Wake Inputs WK1..3	VWK,max	-0.3		40	V		14
Fail Pin FO1	VFO1,max	-0.3		40	V		14
LINx, CANH, CANL	VBUS,max	-27		40	V		14
Maximum Differential CAN Bus Voltage	VCAN_Diff,max	-40		40	V		14
VCAN Input Voltage	VVCAN,max	-0.3		5.5	V		14
Junction Temperature (abs max)	Tj	-40		150	°C		15
Storage Temperature	Tstg	-55		150	°C		15
ESD Resistivity to GND, CANH, CANL, LINx	VESD,13	-8		8	kV	HBM	15
Supply Voltage functional	VS,func			28	V	min is VPOR (see Chapter 15.10)	16
LIN Bus Voltage	VS,LIN,func	6		18	V		16
CAN Supply Voltage	VCAN,func	4.75		5.25	V		16
SPI frequency	fSPI			4	MHz	see Chapter 16.7 for fSPI,max	16
Junction Temperature (functional)	Tj	-40		150	°C		16
Junction to Soldering Point	RthJSP		6		K/W	Exposed Pad	17
Junction to Ambient	RthJA		33		K/W	JEDEC JESD51-2,-5,-7 natural convection FR4 2s2p board for 1.5W	17
Normal Mode current consumption	INormal		3.5	6.5	mA	VS = 5.5 V to 28 V; Tj = -40 °C to +150 °C; VCC2, CAN, LIN, VCC3, HSx = OFF	18
Stop Mode current consumption	IStop_1,25		44	60	µA	VCC2/3, HSx = OFF; no load on VCC1; I_PEAK_TH = '0'	18
Stop Mode current consumption	IStop_1,85		50	70	µA	Tj = 85°C; I_PEAK_TH = '0'	18
Stop Mode current consumption (high peak threshold)	IStop_2,25		64	90	µA	I_PEAK_TH = '1'	18
Stop Mode current consumption (high peak threshold)	IStop_2,85		70	100	µA	Tj = 85°C; I_PEAK_TH = '1'	19
Sleep Mode current consumption	ISleep,25		15	25	µA	VCC2/3, HSx = OFF; CAN, LINx, WKx not wake capable	19
Sleep Mode current consumption	ISleep,85		25	35	µA	Tj = 85°C	19
CAN module current, recessive	ICAN,rec		2	3	mA	CAN Normal Mode; VTXDCAN = VCC1; no RL on CAN	19
CAN module current, dominant	ICAN,dom		3	4.5	mA	CAN Normal Mode; VTXDCAN = GND; no RL on CAN	19
CAN module current, Receive Only	ICAN,RcvOnly		0.9	1.2	mA	CAN Receive Only Mode	19
LIN module current, recessive	ILIN,rec		0.1	1	mA	LIN Normal Mode; VTXDLIN = VCC1; no RL on LIN	20
LIN module current, dominant	ILIN,dom		1	1.5	mA	LIN Normal Mode; VTXDLIN = GND; no RL on LIN	20
LIN module current, Receive Only	ILIN,RcvOnly		0.2	0.5	mA	LIN Receive Only Mode	20
WK1..3 wake capability current	IWake,WKx,25		0.2	2	µA	SBC Sleep Mode; WK1..3 wake capable; LIN, CAN = OFF	20
CAN wake capability current	IWake,CAN,25		4.5	6	µA	SBC Sleep Mode; CAN wake capable; WK1..3, LIN = OFF	21
VCC2 Normal Mode current consumption	INormal,VCC2		2.5	3.5	mA	VS = 5.5 V to 28 V; Tj = -40 °C to +150 °C; VCC2 = ON (no load)	21
VCC1 output voltage	VCC1,out1	4.9	5	5.1	V	SBC Normal Mode; 10µA < IVCC1 < 250mA; 6V < VS < 28V	42
VCC1 output voltage	VCC1,out3	4.97		5.07	V	SBC Normal Mode; 20mA < IVCC1 < 90mA 8V < VS < 18V 25°C < Tj < 125°C	42
VCC1 output voltage Stop Mode	VCC1,out41	4.9	5.05	5.2	V	SBC Stop Mode; 1mA < IVCC1 < IVCC1,Ipeak	42
VCC1 output voltage Stop Mode	VCC1,out42	4.9	5.05	5.25	V	SBC Stop Mode; 10µA < IVCC1 < 1mA	42
VCC1 Output Drop	VCC1,d2			500	mV	IVCC1 = 150mA; VS =5V	42
VCC2 output voltage	VCC2,out1	4.9	5	5.1	V	SBC Normal Mode; 10µA < IVCC2 < 100mA; 6.5V < VS < 28V	47
VCC2 output voltage	VCC2,out5	4.9	5.05	5.2	V	Stop, Sleep Mode; 1mA < IVCC2 < IVCC2,Ipeak	47
VCC2 Output Drop	VCC2,d1			500	mV	IVCC2 = 30mA; VS = 5V	47
VCC3 external regulator drive current capability	IVCC3base	40	60	80	mA	VVCC3base = 13.5 V	56
Output Current Shunt Voltage Threshold	Vshunt_threshold	180	245	310	mV		56
Base to emitter resistor	RBE	120	150	185	kΩ	VCC3 = OFF	56
VCC3 output voltage 5.0V stand-alone	VCC3,out2	4.9	5	5.1	V	SBC Normal Mode; stand-alone configuration 10 mA < IVCC3 < 300 mA	57
HS static on-resistance 25C	RON,HS25		7	10	Ω	Ids = 60mA, Tj < 25°C	64
HS static on-resistance 150C	RON,HS150		11.5	16	Ω	Ids = 60mA, Tj < 150°C	64
HS Short Circuit Shutdown Current	ISD,HS	150	245	300	mA	VSHS = 6 to 20V, hysteresis included	64
HS Open Load Detection Current	IOL,HS	0.4		3	mA	hysteresis included	64
HS Leakage Current per channel	Ileak,HS			2	µA	0 V < VHSx < VSHS; Tj < 85°C	64

CAD (KiCad official)

Symbol: TLE9263BQXXUMA1
Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
3D model files: tle9263bqxxuma1-etched.step / tle9263bqxxuma1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle9263bqxxuma1.step / tle9263bqxxuma1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Infineon Technologies datasheet (173 pp, sha256 f6bd63dfc9786644, retrieved 2026-10-26, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TLE9263BQXXUMA1

**Infineon Technologies** · Interface - Specialized · VQFN-48-EP(7x7)

TLE9263BQXXUMA1 from Infineon Technologies, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground; all GND pins and the cooling tab must be connected to one common GND potential. |
| 2 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 3 | VCC3REF | passive | Collector connection for the external PNP and reference input of voltage regulator 3; absolute maximum -0.3 V to 28 V (40 V load dump, max 400 ms). |
| 4 | VCC3B | output | Base connection for the external PNP; absolute maximum -0.3 V to VS + 10 V (40 V load dump, max 400 ms). |
| 5 | VCC3SH | passive | Emitter connection for the external PNP, shunt connection; absolute maximum VS - 0.3 V to VS + 0.3 V. |
| 6 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 7 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 8 | HS1 | output | High-side output 1, typ. 7 Ω, supplied from VSHS; leave open if unused. |
| 9 | HS2 | output | High-side output 2, typ. 7 Ω, supplied from VSHS; leave open if unused. |
| 10 | HS3 | output | High-side output 3, typ. 7 Ω, supplied from VSHS; leave open if unused. |
| 11 | HS4 | output | High-side output 4, typ. 7 Ω, supplied from VSHS; leave open if unused. |
| 12 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 13 | VSHS | power_in | Supply for the high-side switches, LIN and GPIO1/2 in HS configuration; connect to battery via reverse protection diode and EMC filter, or to VS if no separate supply is needed; absolute maximum 28 V (40 V load dump, max 400 ms). |
| 14 | VS | power_in | Supply for chip internal supply and voltage regulators; connect to battery via external reverse protection diode and EMC filter; absolute maximum 28 V (40 V load dump, max 400 ms). |
| 15 | VS | power_in | Supply for chip internal supply and voltage regulators; connect to battery via external reverse protection diode and EMC filter; absolute maximum 28 V (40 V load dump, max 400 ms). |
| 16 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 17 | VCC1 | power_out | Voltage regulator 1 output (5 V up to 250 mA, 3.3 V variant available); absolute maximum 5.5 V. |
| 18 | VCC2 | power_out | Voltage regulator 2 output (5 V up to 100 mA, with off-board usage protection); leave open and disabled if unused. |
| 19 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 20 | GND | power_in | Ground; all GND pins and the cooling tab must be connected to one common GND potential. |
| 21 | FO1 | output | Fail output 1; absolute maximum -0.3 V to 40 V; leave open if unused. |
| 22 | WK1 | input | Wake input 1, absolute maximum -0.3 V to 40 V; alternative function is HV-measurement input (only in combination with WK2). |
| 23 | WK2 | input | Wake input 2, absolute maximum -0.3 V to 40 V; alternative function is HV-measurement output (only in combination with WK1). |
| 24 | WK3 | input | Wake input 3, absolute maximum -0.3 V to 40 V; connect to GND and disable via SPI if unused. |
| 25 | TXDLIN2 | input | Transmit data input for LIN2; logic level referenced to VCC1 (max VCC1 + 0.3 V). |
| 26 | RXDLIN2 | output | Receive data output for LIN2; logic level referenced to VCC1 (max VCC1 + 0.3 V). |
| 27 | CLK | input | SPI clock input. |
| 28 | SDI | input | SPI data input into the SBC (MOSI). |
| 29 | SDO | output | SPI data output from the SBC (MISO). |
| 30 | CSN | input | SPI chip select not input (active low). |
| 31 | INT | output | Active-low interrupt output used as wake-up flag in SBC Stop or Normal Mode and for indicating failures; at start-up an external pull-up sets config 1/3, no external pull-up sets config 2/4. |
| 32 | RO | output | Reset output. |
| 33 | TXDLIN1 | input | Transmit data input for LIN1; logic level referenced to VCC1 (max VCC1 + 0.3 V). |
| 34 | RXDLIN1 | output | Receive data output for LIN1; logic level referenced to VCC1 (max VCC1 + 0.3 V). |
| 35 | TXDCAN | input | Transmit data input for CAN; logic level referenced to VCC1 (max VCC1 + 0.3 V). |
| 36 | RXDCAN | output | Receive data output for CAN; logic level referenced to VCC1 (max VCC1 + 0.3 V). |
| 37 | VCAN | power_in | Supply input for the internal HS-CAN cell; absolute maximum -0.3 V to 5.5 V; connect to VCC1 if CAN is unused. |
| 38 | GND | power_in | Ground; all GND pins and the cooling tab must be connected to one common GND potential. |
| 39 | CANL | bidirectional | CAN low bus pin; absolute maximum -27 V to 40 V. |
| 40 | CANH | bidirectional | CAN high bus pin; absolute maximum -27 V to 40 V. |
| 41 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 42 | LIN1 | bidirectional | LIN1 bus line according to LIN 2.2/ISO 17987-4 and SAE J2602-2; absolute maximum -27 V to 40 V. |
| 43 | GND | power_in | Ground; all GND pins and the cooling tab must be connected to one common GND potential. |
| 44 | LIN2 | bidirectional | LIN2 bus line according to LIN 2.2/ISO 17987-4 and SAE J2602-2; absolute maximum -27 V to 40 V. |
| 45 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 46 | n.c. | unconnected | Not connected, internally not bonded; datasheet hints say to connect to GND. |
| 47 | FO2 | bidirectional | Fail output 2 (side indicator, 1.25 Hz 50% duty, open drain, active low); alternatively GPIO1 configurable as WK, LS or HS supplied by VSHS; absolute maximum -0.3 V to VS + 0.3 V. |
| 48 | FO3/TEST | bidirectional | Fail output 3 (break/rear light, 100 Hz 20% duty, open drain, active low) or GPIO2; as TEST, connect to GND to activate SBC Development Mode, integrated pull-up, connect to VS via pull-up or leave open for normal operation. |
| 49 | GND | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | VQFN-48-EP(7x7) |
| Category | Interface ICs |
| Pins | 49 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VS, VSHS) | VSx,max | -0.3 |  | 28 | V |  | 14 |
| Supply Voltage (VS, VSHS) load dump | VSx,max | -0.3 |  | 40 | V | Load Dump, max. 400 ms | 14 |
| Voltage Regulator 1 | VCC1,max | -0.3 |  | 5.5 | V | VCC1 = 5.6V for max. 10s | 14 |
| Voltage Regulator 2 | VCC2,max | -0.3 |  | 28 | V | VCC2 = 40V for Load Dump, max. 400 ms | 14 |
| Voltage Regulator 3 (VCC3REF) | VCC3REF,max | -0.3 |  | 28 | V | VCC3REF = 40V for Load Dump, max. 400 ms | 14 |
| Wake Inputs WK1..3 | VWK,max | -0.3 |  | 40 | V |  | 14 |
| Fail Pin FO1 | VFO1,max | -0.3 |  | 40 | V |  | 14 |
| LINx, CANH, CANL | VBUS,max | -27 |  | 40 | V |  | 14 |
| Maximum Differential CAN Bus Voltage | VCAN_Diff,max | -40 |  | 40 | V |  | 14 |
| VCAN Input Voltage | VVCAN,max | -0.3 |  | 5.5 | V |  | 14 |
| Junction Temperature (abs max) | Tj | -40 |  | 150 | °C |  | 15 |
| Storage Temperature | Tstg | -55 |  | 150 | °C |  | 15 |
| ESD Resistivity to GND, CANH, CANL, LINx | VESD,13 | -8 |  | 8 | kV | HBM | 15 |
| Supply Voltage functional | VS,func |  |  | 28 | V | min is VPOR (see Chapter 15.10) | 16 |
| LIN Bus Voltage | VS,LIN,func | 6 |  | 18 | V |  | 16 |
| CAN Supply Voltage | VCAN,func | 4.75 |  | 5.25 | V |  | 16 |
| SPI frequency | fSPI |  |  | 4 | MHz | see Chapter 16.7 for fSPI,max | 16 |
| Junction Temperature (functional) | Tj | -40 |  | 150 | °C |  | 16 |
| Junction to Soldering Point | RthJSP |  | 6 |  | K/W | Exposed Pad | 17 |
| Junction to Ambient | RthJA |  | 33 |  | K/W | JEDEC JESD51-2,-5,-7 natural convection FR4 2s2p board for 1.5W | 17 |
| Normal Mode current consumption | INormal |  | 3.5 | 6.5 | mA | VS = 5.5 V to 28 V; Tj = -40 °C to +150 °C; VCC2, CAN, LIN, VCC3, HSx = OFF | 18 |
| Stop Mode current consumption | IStop_1,25 |  | 44 | 60 | µA | VCC2/3, HSx = OFF; no load on VCC1; I_PEAK_TH = '0' | 18 |
| Stop Mode current consumption | IStop_1,85 |  | 50 | 70 | µA | Tj = 85°C; I_PEAK_TH = '0' | 18 |
| Stop Mode current consumption (high peak threshold) | IStop_2,25 |  | 64 | 90 | µA | I_PEAK_TH = '1' | 18 |
| Stop Mode current consumption (high peak threshold) | IStop_2,85 |  | 70 | 100 | µA | Tj = 85°C; I_PEAK_TH = '1' | 19 |
| Sleep Mode current consumption | ISleep,25 |  | 15 | 25 | µA | VCC2/3, HSx = OFF; CAN, LINx, WKx not wake capable | 19 |
| Sleep Mode current consumption | ISleep,85 |  | 25 | 35 | µA | Tj = 85°C | 19 |
| CAN module current, recessive | ICAN,rec |  | 2 | 3 | mA | CAN Normal Mode; VTXDCAN = VCC1; no RL on CAN | 19 |
| CAN module current, dominant | ICAN,dom |  | 3 | 4.5 | mA | CAN Normal Mode; VTXDCAN = GND; no RL on CAN | 19 |
| CAN module current, Receive Only | ICAN,RcvOnly |  | 0.9 | 1.2 | mA | CAN Receive Only Mode | 19 |
| LIN module current, recessive | ILIN,rec |  | 0.1 | 1 | mA | LIN Normal Mode; VTXDLIN = VCC1; no RL on LIN | 20 |
| LIN module current, dominant | ILIN,dom |  | 1 | 1.5 | mA | LIN Normal Mode; VTXDLIN = GND; no RL on LIN | 20 |
| LIN module current, Receive Only | ILIN,RcvOnly |  | 0.2 | 0.5 | mA | LIN Receive Only Mode | 20 |
| WK1..3 wake capability current | IWake,WKx,25 |  | 0.2 | 2 | µA | SBC Sleep Mode; WK1..3 wake capable; LIN, CAN = OFF | 20 |
| CAN wake capability current | IWake,CAN,25 |  | 4.5 | 6 | µA | SBC Sleep Mode; CAN wake capable; WK1..3, LIN = OFF | 21 |
| VCC2 Normal Mode current consumption | INormal,VCC2 |  | 2.5 | 3.5 | mA | VS = 5.5 V to 28 V; Tj = -40 °C to +150 °C; VCC2 = ON (no load) | 21 |
| VCC1 output voltage | VCC1,out1 | 4.9 | 5 | 5.1 | V | SBC Normal Mode; 10µA < IVCC1 < 250mA; 6V < VS < 28V | 42 |
| VCC1 output voltage | VCC1,out3 | 4.97 |  | 5.07 | V | SBC Normal Mode; 20mA < IVCC1 < 90mA 8V < VS < 18V 25°C < Tj < 125°C | 42 |
| VCC1 output voltage Stop Mode | VCC1,out41 | 4.9 | 5.05 | 5.2 | V | SBC Stop Mode; 1mA < IVCC1 < IVCC1,Ipeak | 42 |
| VCC1 output voltage Stop Mode | VCC1,out42 | 4.9 | 5.05 | 5.25 | V | SBC Stop Mode; 10µA < IVCC1 < 1mA | 42 |
| VCC1 Output Drop | VCC1,d2 |  |  | 500 | mV | IVCC1 = 150mA; VS =5V | 42 |
| VCC2 output voltage | VCC2,out1 | 4.9 | 5 | 5.1 | V | SBC Normal Mode; 10µA < IVCC2 < 100mA; 6.5V < VS < 28V | 47 |
| VCC2 output voltage | VCC2,out5 | 4.9 | 5.05 | 5.2 | V | Stop, Sleep Mode; 1mA < IVCC2 < IVCC2,Ipeak | 47 |
| VCC2 Output Drop | VCC2,d1 |  |  | 500 | mV | IVCC2 = 30mA; VS = 5V | 47 |
| VCC3 external regulator drive current capability | IVCC3base | 40 | 60 | 80 | mA | VVCC3base = 13.5 V | 56 |
| Output Current Shunt Voltage Threshold | Vshunt_threshold | 180 | 245 | 310 | mV |  | 56 |
| Base to emitter resistor | RBE | 120 | 150 | 185 | kΩ | VCC3 = OFF | 56 |
| VCC3 output voltage 5.0V stand-alone | VCC3,out2 | 4.9 | 5 | 5.1 | V | SBC Normal Mode; stand-alone configuration 10 mA < IVCC3 < 300 mA | 57 |
| HS static on-resistance 25C | RON,HS25 |  | 7 | 10 | Ω | Ids = 60mA, Tj < 25°C | 64 |
| HS static on-resistance 150C | RON,HS150 |  | 11.5 | 16 | Ω | Ids = 60mA, Tj < 150°C | 64 |
| HS Short Circuit Shutdown Current | ISD,HS | 150 | 245 | 300 | mA | VSHS = 6 to 20V, hysteresis included | 64 |
| HS Open Load Detection Current | IOL,HS | 0.4 |  | 3 | mA | hysteresis included | 64 |
| HS Leakage Current per channel | Ileak,HS |  |  | 2 | µA | 0 V < VHSx < VSHS; Tj < 85°C | 64 |

## CAD (KiCad official)

- Symbol: `TLE9263BQXXUMA1`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`
- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files: `tle9263bqxxuma1-etched.step` / `tle9263bqxxuma1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tle9263bqxxuma1.step` / `tle9263bqxxuma1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://www.infineon.com/dgdl/Infineon-TLE9263BQX-DS-v01_00-EN.pdf?fileId=5546d462602a9dc801609805e310398a) (173 pp, sha256 `f6bd63dfc9786644`, retrieved 2026-10-26, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tle9263bqxxuma1-datasheet.pdf)