component
TLE8888QKXUMA1
Public Made by Adomby adom
Infineon Technologies Power Management Specialized - PMIC, LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TLE8888QKXUMA1
Infineon Technologies · Power Management Specialized - PMIC · LQFP-100(14x14)
TLE8888QKXUMA1 from Infineon Technologies, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | bidirectional | Reset; bidirectional pin for reset functions. |
| 2 | MON | bidirectional | Monitor; bidirectional pin for monitoring functions. |
| 3 | CSN | input | MSC/SPI slave chip select; single ended chip select for MSC and SPI. |
| 4 | SDO | output | MSC/SPI serial data output for MSC and SPI. |
| 5 | SIP | input | MSC/SPI data input; positive data input of LVDS in MSC mode or single ended data input in SPI mode. |
| 6 | SIN | input | MSC data input or select input; negative data input of LVDS in MSC mode or select input for SPI mode. |
| 7 | FCLP | input | MSC/SPI clock input; positive clock input of LVDS in MSC mode or single ended clock input in SPI mode. |
| 8 | FCLN | input | Select input or MSC clock input; negative clock input of LVDS in MSC mode or select input for single ended mode (SPI or MSC). |
| 9 | T5V1 | power_out | 5 V tracker output; supply voltage for off-board sensors (absolute maximum -1 V to 40 V). |
| 10 | T5V2 | power_out | 5 V tracker output; supply voltage for off-board sensors (absolute maximum -1 V to 40 V). |
| 11 | V5V | power_out | 5 V supply output for main functions of the ECU (absolute maximum 5.5 V). |
| 12 | V6V | power_in | Source of external pre-regulator (absolute maximum 10 V). |
| 13 | VG | output | Gate drive of external pre-regulator (absolute maximum 12 V, VVG - VV6V < 5 V). |
| 14 | OUT7A | output | Low-side power stage; must be connected to OUT7B and OUT7C without any parasitic. |
| 15 | OUT7B | output | Low-side power stage; must be connected to OUT7A and OUT7C without any parasitic. |
| 16 | OUT7C | output | Low-side power stage; must be connected to OUT7A and OUT7B without any parasitic. |
| 17 | OUT20 | output | Low-side small signal stage. |
| 18 | OUT19 | output | Low-side small signal stage. |
| 19 | n.c. | unconnected | Not connected; leave open or connect to GND. |
| 20 | VDDIO | power_in | Supply input for logic level inputs and outputs (absolute maximum 5.5 V). |
| 21 | VROUT | output | Output of variable reluctance sensor interface; digital output to microcontroller. |
| 22 | LINTX | input | Transmit digital input for LIN interface. |
| 23 | LINRX | output | Receive digital output for LIN interface. |
| 24 | INJEN | input | Injector enable input. |
| 25 | PGND | power_in | Power ground; internally connected to cooling tab. |
| 26 | KOFFDO | output | Key off delay output. |
| 27 | IGNEN | input | Ignition enable input. |
| 28 | IN1 | input | Parallel input for direct control of power stage OUT1. |
| 29 | IN2 | input | Parallel input for direct control of power stage OUT2. |
| 30 | IN3 | input | Parallel input for direct control of power stage OUT3. |
| 31 | IN4 | input | Parallel input for direct control of power stage OUT4. |
| 32 | IN5 | input | Parallel input for direct control of push pull stage IGN1. |
| 33 | IN6 | input | Parallel input for direct control of push pull stage IGN2. |
| 34 | IN7 | input | Parallel input for direct control of push pull stage IGN3. |
| 35 | IN8 | input | Parallel input for direct control of push pull stage IGN4. |
| 36 | IN9 | input | Parallel input for direct control of power stages; can be multiplexed to various stages. |
| 37 | IN10 | input | Parallel input for direct control of power stages; can be multiplexed to various stages. |
| 38 | IN11 | input | Parallel input for direct control of power stages; can be multiplexed to various stages. |
| 39 | IN12 | input | Parallel input for direct control of power stages; can be multiplexed to various stages. |
| 40 | EOTEN | input | Engine off timer enable input. |
| 41 | V5VSTBY | power_out | 5 V standby supply output; supply voltage in sleep mode (absolute maximum 5.5 V). |
| 42 | CANWKEN | input | Enable input for remote CAN wake-up. |
| 43 | CANRX | output | Receive digital output for CAN. |
| 44 | CANTX | input | Transmit digital input for CAN. |
| 45 | V5VCAN | power_in | 5 V supply input for CAN (absolute maximum 5.5 V). |
| 46 | CANH | bidirectional | CAN bus high. |
| 47 | CANL | bidirectional | CAN bus low. |
| 48 | WK | input | Wake-up input; input signal and supply for MR (absolute maximum -16 V to 40 V). |
| 49 | KEY | input | Key input; input signal and supply for MR (absolute maximum -16 V to 40 V). |
| 50 | PGND | power_in | Power ground; internally connected to cooling tab. |
| 51 | VRIN2 | input | Differential input of variable reluctance sensor; analog input from sensor. |
| 52 | VRIN1 | input | Differential input of variable reluctance sensor; analog input from sensor. |
| 53 | BATSTBY | power_in | Battery input for standby supply regulator (absolute maximum -16 V to 40 V). |
| 54 | BAT | power_in | Battery supply voltage for main functions of the device (absolute maximum -16 V to 40 V). |
| 55 | MR | output | Low-side power stage for main relay (absolute maximum -16 V to 40 V). |
| 56 | OUT18 | output | Low-side power stage. |
| 57 | OUT17 | output | Low-side power stage. |
| 58 | OUT16 | output | Low-side power stage. |
| 59 | OUT1A | output | Low-side power stage; must be connected to OUT1B without any parasitic. |
| 60 | OUT1B | output | Low-side power stage; must be connected to OUT1A without any parasitic. |
| 61 | OUT2A | output | Low-side power stage; must be connected to OUT2B without any parasitic. |
| 62 | OUT2B | output | Low-side power stage; must be connected to OUT2A without any parasitic. |
| 63 | OUT3A | output | Low-side power stage; must be connected to OUT3B without any parasitic. |
| 64 | OUT3B | output | Low-side power stage; must be connected to OUT3A without any parasitic. |
| 65 | OUT4A | output | Low-side power stage; must be connected to OUT4B without any parasitic. |
| 66 | OUT4B | output | Low-side power stage; must be connected to OUT4A without any parasitic. |
| 67 | OUT15 | output | Low-side power stage. |
| 68 | OUT14 | output | Low-side power stage. |
| 69 | DFB8 | input | Drain feedback related to OUT8. |
| 70 | OUT8 | output | Push pull stage to control on-board MOSFET. |
| 71 | DFB9 | input | Drain feedback related to OUT9. |
| 72 | OUT9 | output | Push pull stage to control on-board MOSFET. |
| 73 | DFB10 | input | Drain feedback related to OUT10. |
| 74 | OUT10 | output | Push pull stage to control on-board MOSFET. |
| 75 | PGND | power_in | Power ground; internally connected to cooling tab. |
| 76 | DFB11 | input | Drain feedback related to OUT11. |
| 77 | OUT11 | output | Push pull stage to control on-board MOSFET. |
| 78 | DFB12 | input | Drain feedback related to OUT12. |
| 79 | OUT12 | output | Push pull stage to control on-board MOSFET. |
| 80 | DFB13 | input | Drain feedback related to OUT13. |
| 81 | OUT13 | output | Push pull stage to control on-board MOSFET. |
| 82 | LINIO | bidirectional | Bus pin for LIN interface. |
| 83 | OUT5A | output | Low-side power stage; must be connected to OUT5B and OUT5C without any parasitic. |
| 84 | OUT5B | output | Low-side power stage; must be connected to OUT5A and OUT5C without any parasitic. |
| 85 | OUT5C | output | Low-side power stage; must be connected to OUT5A and OUT5B without any parasitic. |
| 86 | OUT24 | output | Half bridge stage. |
| 87 | BATPA | power_in | Battery supply for half bridges and the charge pump (absolute maximum 40 V); must be connected to BATPB without any parasitic. |
| 88 | OUT23 | output | Half bridge stage. |
| 89 | OUT22 | output | Half bridge stage. |
| 90 | BATPB | power_in | Battery supply for half bridges and the charge pump (absolute maximum 40 V); must be connected to BATPA without any parasitic. |
| 91 | OUT21 | output | Half bridge stage. |
| 92 | OUT6A | output | Low-side power stage; must be connected to OUT6B and OUT6C without any parasitic. |
| 93 | OUT6B | output | Low-side power stage; must be connected to OUT6A and OUT6C without any parasitic. |
| 94 | OUT6C | output | Low-side power stage; must be connected to OUT6A and OUT6B without any parasitic. |
| 95 | CP | power_out | Charge pump output; add external capacitance to stabilise charge pump voltage (absolute maximum 45 V). |
| 96 | IGN1 | output | Push pull stage to control on- or off-board IGBT. |
| 97 | IGN2 | output | Push pull stage to control on- or off-board IGBT. |
| 98 | IGN3 | output | Push pull stage to control on- or off-board IGBT. |
| 99 | IGN4 | output | Push pull stage to control on- or off-board IGBT. |
| 100 | AGND | power_in | Signal ground; internally connected to PGND and cooling tab. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | LQFP-100(14x14) |
| Category | Power Management ICs |
| Pins | 100 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage reduced operation | VBAT,ro | 4.5 | 6 | V | reduced operation range | 15 | |
| Supply voltage low drop range | VBAT,ld | 6 | 9 | V | low drop operation range | 15 | |
| Supply voltage normal operation | VBAT,nop | 9 | 28 | V | normal operation range | 15 | |
| Supply voltage overvoltage range | VBAT,ov | 28 | 40 | V | power stages are switched off | 15 | |
| Junction temperature | Tj | -40 | 150 | °C | 14 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 14 | ||
| BATPA, BATPB, OUT8…13, DFB8…13 voltage | VBATPA,MR | -0.3 | 40 | V | 12 | ||
| CP voltage | VCP,MR | -0.3 | 45 | V | -0.3 V < VCP - VBATPA <5V | 12 | |
| OUT1…7, OUT14…20 voltage | VOUT1…7,MR | -0.3 | 50 | V | OUTn is switched off, clamping is allowed | 12 | |
| V6V voltage | VV6V,MR | -0.3 | 10 | V | 12 | ||
| VG voltage | VVG,MR | -0.3 | 12 | V | VVG - VV6V <5V | 12 | |
| V5V, V5VSTBY, VDDIO, V5VCAN voltage | VV5V,MR | -0.3 | 5.5 | V | 12 | ||
| T5V1, T5V2, IGN1…4 voltage | VT5V1,MR | -1 | 40 | V | 12 | ||
| BAT, BATSTBY, KEY, WK, MR voltage | VBAT,MR | -16 | 40 | V | 12 | ||
| VRIN1 voltage | VVRIN1,MR | -0.3 | 40 | V | VRIN2 open | 13 | |
| LINIO, CANH, CANL voltage | VLINIO,MR | -40 | 40 | V | 13 | ||
| PGND current | IPGND,MR | -25 | 25 | A | 13 | ||
| ESD HBM | VESDHBM | -2 | 2 | kV | HBM | 14 | |
| ESD HBM high-voltage pins to PGND | VESD,HBM | -4 | 4 | kV | HBM | 14 | |
| ESD CDM | VESDCDM | -500 | 500 | V | CDM | 14 | |
| Thermal resistance junction to case | RthJC | 2.4 | K/W | 15 | |||
| V6V output voltage | VV6V | 5.5 | 6 | 6.5 | V | with respect to AGND, with external MOS FET IPD30N06S2L-23 | 60 |
| V5V output voltage | VV5V | 4.9 | 5.1 | V | -5 mA < IV5V < -500 mA, with respect to AGND | 60 | |
| V5V current limitation | IV5V,lim | -1200 | -500 | mA | 60 | ||
| V5VSTBY output voltage | VV5VSTBY | 4.75 | 5.25 | V | -10 µA < IV5VSTBY < -15 mA | 61 | |
| Total standby current | ISTBY | 120 | µA | ECU sleep mode, Tj = 25°C, IV5VSTBY = 0 mA, VBATSTBY = VBAT = VMR = 13.5 V | 61 | ||
| Current consumption BATPA, BATPB, BAT, V6V | IBAT,sum | 50 | mA | static, all off, no PWM and MSC/SPI communication | 60 | ||
| VDDIO supply voltage range | VVDDIO | 3 | 5.5 | V | 61 | ||
| T5Vx current limitation | IT5Vx,lim | -300 | -100 | mA | 61 | ||
| V5V undervoltage threshold decreasing | VUV,V5V,dec | 4.45 | 4.7 | V | VV5V decreasing | 62 | |
| V5V overvoltage threshold | VOV,V5V | 5.2 | 5.6 | V | VV5V increasing | 62 | |
| BAT overvoltage threshold | VOV,BAT | 28 | 30.4 | V | VBAT increasing | 62 | |
| Internal power on reset threshold | Vpor,int,th | 2.8 | V | of internal supply voltage | 29 | ||
| Key on detection threshold | VKEY,th | 3.6 | 4.5 | V | rising edge | 55 | |
| Wake-up detection threshold | VWK,th | 3.6 | 4.5 | V | rising edge | 55 | |
| MR operation current | IMR | 0.8 | A | 56 | |||
| MR on voltage | VMR | 1.35 | V | IMR = 0.3 A | 56 | ||
| MR clamping voltage | VMR,cl | 40 | 60 | V | IMR = 0.2 A | 56 | |
| OUT1…4 operation current | IOUTn | 2.2 | A | 72 | |||
| OUT1…4 on resistance | ROUTn,on | 550 | mΩ | IOUTn = 2.2 A | 72 | ||
| OUT5…7 on resistance | ROUTn,on | 350 | mΩ | IOUTn =3A | 73 | ||
| OUT14…20 on resistance | ROUTn,on | 1.5 | Ω | IOUTn = 0.6 A | 74 | ||
| OUT21…24 on resistance | ROUTn,on | 2.4 | Ω | IOUTn = 0.3 A | 82 | ||
| OUT1…4 clamping voltage | VOUTn,cv | 50 | 60 | V | IOUTn = 0.2 A | 72 | |
| OUT8…13 high level output voltage | VOUTn,h | 4 | 5.5 | V | IOUTn = -5 mA | 85 | |
| IGN1…4 high level output voltage | VIGNn,h | 4.35 | V | IIGNn = -15 mA, | 88 | ||
| Direct drive input low level | VIN,l | -0.3 | 0.9 | V | 70 | ||
| Direct drive input high level | VIN,h | 2 | V | upper limit VVDDIO | 70 | ||
| Overtemperature switch off threshold OUT1…7, OUT14…20 | TOUTn,ot | 150 | 200 | °C | 75 |
CAD (KiCad official)
- Symbol:
TLE8888QKXUMA1 - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
tle8888qkxuma1-etched.step/tle8888qkxuma1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tle8888qkxuma1.step/tle8888qkxuma1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (208 pp, sha256
3ec872e500dc5cab, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).