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TLE6250G

Infineon Technologies · CAN Transceivers · SOIC-8

TLE6250G from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TxD input CAN transmit data input with a 20 kΩ pull-up (10 to 50 kΩ per the electrical table); a low level drives the bus dominant.
2 GND power_in Ground reference for the transceiver; all voltages are specified with respect to ground.
3 VCC power_in 5 V supply input; operating range 4.5 V to 5.5 V, absolute maximum -0.3 V to 6.5 V.
4 RxD output CAN receive data output that is low in the dominant state and has an integrated pull-up.
5 RM input Receive-only mode control input with a 20 kΩ pull-up; set low to enter receive-only mode.
6 CANL bidirectional Low line CAN bus I/O that is low in the dominant state; bus pins are short-circuit proof to ground and battery voltage, with CAN input voltage rated at -40 V to 40 V.
7 CANH bidirectional High line CAN bus I/O that is high in the dominant state; bus pins are short-circuit proof to ground and battery voltage, with CAN input voltage rated at -40 V to 40 V.
8 INH input Inhibit control input with a 20 kΩ pull-up; set low to enter normal mode, high selects stand-by mode.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.3 6.5 V 7
CAN input voltage (CANH, CANL) VCANH/L -40 40 V 7
Logic voltages at INH, RM, TxD, RxD VI -0.3 V 0V< VCC < 5.5 V 7
Electrostatic discharge voltage at CANH, CANL VESD -6 6 kV human body model (100 pF via 1.5 kΩ) 7
Electrostatic discharge voltage VESD -2 2 kV human body model (100 pF via 1.5 kΩ) 7
Junction temperature Tj -40 160 °C 7
Supply voltage VCC 4.5 5.5 V 7
Junction temperature Tj -40 150 °C 7
Thermal shutdown temperature TjSD 160 200 °C 10°C hysteresis; not subject to production test (footnote 1) 7
Junction ambient thermal resistance Rthj-a 185 K/W in PG-DSO-8 package 7
Current consumption, recessive state ICC 6 10 mA recessive state; VTxD = VCC 8
Current consumption, dominant state ICC 45 70 mA dominant state; VTxD =0V 8
Current consumption, receive-only mode ICC 6 10 mA receive-only mode; RM = “low” 8
Current consumption, stand-by mode ICC,stb 1 10 µA stand-by mode; TxD = RM = “high” 8
RxD high output current IRD,H -4 -2 mA VRD = 0.8 × VCC; Vdiff < 0.4 V 8
RxD low output current IRD,L 2 4 mA VRD = 0.2 × VCC; Vdiff >1V 8
TxD pull-up resistance RTD 10 25 50 kΩ 8
INH pull-up resistance RINH 10 25 50 kΩ 8
RM pull-up resistance RRM 10 25 50 kΩ 9
Differential receiver threshold voltage, recessive to dominant edge Vdiff,d 0.75 0.9 V 20 V < (VCANH, VCANL) < 25 V; Vdiff = VCANH - VCANL 9
Differential receiver threshold voltage, dominant to recessive edge Vdiff,r 0.5 0.6 V 20 V < (VCANH, VCANL) < 25 V; Vdiff = VCANH - VCANL 9
Common mode range CMR -20 25 V VCC =5V 9
CANH, CANL input resistance Ri 10 20 30 kΩ recessive state 9
Differential input resistance Rdiff 20 40 60 kΩ recessive state 9
CANH, CANL recessive output voltage difference, no load Vdiff -1 0.05 V VTxD = VCC; no load 10
CANL dominant output voltage VCANL 2 V VTxD = 0 V; VCC =5V 10
CANH dominant output voltage VCANH 2.8 V VTxD = 0 V; VCC =5V 10
CANH, CANL dominant output voltage difference Vdiff 1.5 3 V VTxD = 0 V; VCC =5V 10
CANL short circuit current ICANLsc 50 120 200 mA VCANLshort = 18 V 10
CANH short circuit current ICANHsc -200 -120 -50 mA VCANHshort =0V 10
Output current (CANH/CANL leakage) ICANH,lk -50 -300 -400 µA VCC = 0 V; VCANH = VCANL = -7 V 10
Output current (CANH/CANL leakage) ICANH,lk -50 -100 -150 µA VCC = 0 V; VCANH = VCANL = -2 V 10
Output current (CANH/CANL leakage) ICANH,lk 50 280 400 µA VCC = 0 V; VCANH = VCANL =7V 10
Output current (CANH/CANL leakage) ICANH,lk 50 100 150 µA VCC = 0 V; VCANH = VCANL =2V 10
Propagation delay TxD-to-RxD low (recessive to dominant) td(L),TR 150 255 ns CL = 47 pF; RL = 60 Ω; VCC = 5 V; CRxD = 20 pF 11
Propagation delay TxD-to-RxD high (dominant to recessive) td(H),TR 150 255 ns CL = 47 pF; RL = 60 Ω; VCC = 5 V; CRxD = 20 pF 11
Propagation delay TxD low to bus dominant td(L),T 100 140 ns CL = 47 pF; RL = 60 Ω; VCC =5V 11
Propagation delay TxD high to bus recessive td(H),T 100 140 ns CL = 47 pF; RL = 60 Ω; VCC =5V 11
Propagation delay bus dominant to RxD low td(L),R 50 140 ns CL = 47 pF; RL = 60 Ω; VCC = 5 V; CRxD = 20 pF 11
Propagation delay bus recessive to RxD high td(H),R 50 140 ns CL = 47 pF; RL = 60 Ω; VCC = 5 V; CRxD = 20 pF 11
CANL short circuit current ICANLsc 150 mA VCANLshort = 36 V 10
CANH short circuit current ICANHsc -120 mA VCANHshort = -5 V 10
Differential receiver hysteresis Vdiff,hys 150 mV 9

CAD (KiCad official)

  • Symbol: TLE6250G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tle6250g-etched.step / tle6250g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle6250g.step / tle6250g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (24 pp, sha256 fd93097ace07e156, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF