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TLE42712GATMA1
Public Made by Adomby adom
Infineon Technologies Linear Voltage Regulators (LDO), TO-263-7. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLE42712GATMA1
Infineon Technologies · Linear Voltage Regulators (LDO) · TO-263-7
TLE42712GATMA1 from Infineon Technologies, in a TO-263-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I | power_in | Input supply, operating range 6 V to 40 V (abs max -42 V to 42 V, 65 V for t ≤ 400 ms); block to ground directly at the IC with a ceramic capacitor. |
| 2 | INH | input | Inhibit input that switches the regulator off when below the turn-off voltage (VL,INH 0.8 V to 3.3 V) and on above the turn-on voltage (VU,INH 1.0 V to 3.5 V); abs max -42 V to 42 V. |
| 3 | RO | output | Reset output, open collector connected to the 5 V output via an integrated 30 kΩ resistor. |
| 4 | GND | power_in | Ground. |
| 5 | D | passive | Reset delay pin; connect a capacitor to ground to set the reset delay and watchdog timing (abs max -0.3 V to 7 V). |
| 6 | WI | input | Watchdog input monitoring the connected controller, with rising edges required within the watchdog period to avoid reset (abs max -0.3 V to 7 V). |
| 7 | Q | power_out | 5 V regulated output (4.90 V to 5.10 V); block to ground with a 22 µF capacitor, ESR < 3 Ω. |
| 8 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-263-7 |
| Category | Power Supply Chip |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VQ | 4.9 | 5 | 5.1 | V | IQ = 5 mA to 550 mA; VI = 6 V to 26 V | 7 |
| Output current limiting | IQmax | 650 | 800 | mA | VQ = 0 V | 7 | |
| Current consumption Iq = II | Iq | 6 | µA | VINH = 0 V; IQ = 0 mA | 7 | ||
| Current consumption Iq = II - IQ | Iq | 1 | 1.5 | mA | IQ = 5 mA | 7 | |
| Current consumption Iq = II - IQ | Iq | 55 | 75 | mA | IQ = 550 mA | 7 | |
| Current consumption Iq = II - IQ | Iq | 70 | 90 | mA | IQ = 550 mA; VI = 5 V | 7 | |
| Drop voltage | Vdr | 350 | 700 | mV | IQ = 550 mA | 7 | |
| Load regulation | ∆VQ | 25 | 50 | mV | IQ = 5 mA to 550 mA; VI = 6 V | 7 | |
| Supply voltage regulation | ∆VQ | 12 | 25 | mV | VI = 6 V to 26 V; IQ = 5 mA | 7 | |
| Reset switching threshold | VRT | 4.5 | 4.65 | 4.8 | V | 7 | |
| Reset high voltage | VROH | 4.5 | V | 7 | |||
| Reset saturation voltage | VRO,SAT | 200 | 400 | mV | IR = 3 mA; VQ = 4.4 V | 7 | |
| Reset pull-up | R | 18 | 30 | 46 | kΩ | Internally connected to Q | 7 |
| Lower reset timing threshold | VLD | 0.2 | 0.45 | 0.8 | V | VQ < VRT | 7 |
| Charge current | ID | 8 | 14 | 25 | µA | VD = 1.0 V | 7 |
| Upper timing threshold | VUD | 1.4 | 1.8 | 2.3 | V | 7 | |
| Delay time | tD | 8 | 13 | 18 | ms | CD = 100 nF | 7 |
| Reset reaction time | tRR | 3 | µs | CD = 100 nF | 7 | ||
| Overvoltage turn-off voltage | VI,ov | 40 | 44 | 46 | V | 8 | |
| Inhibit turn-on voltage | VU,INH | 1 | 2 | 3.5 | V | VQ = high (> 4.5 V) | 8 |
| Inhibit turn-off voltage | VL,INH | 0.8 | 1.3 | 3.3 | V | VQ = low (< 0.8 V) | 8 |
| Inhibit current | IINH | 8 | 12 | 25 | µA | VINH = 5 V | 8 |
| Upper watchdog switching threshold | VUDW | 1.4 | 1.8 | 2.3 | V | 8 | |
| Lower watchdog switching threshold | VLDW | 0.2 | 0.45 | 0.8 | V | 8 | |
| Watchdog discharge current | IDWD | 1.5 | 2.7 | 3.5 | µA | VD = 1 V | 8 |
| Watchdog charge current | IDWC | 8 | 14 | 25 | µA | VD = 1 V | 8 |
| Watchdog period | tWD,P | 40 | 55 | 80 | ms | CD = 100 nF | 8 |
| Watchdog trigger time | tWI,tr | 30 | 45 | 66 | ms | CD = 100 nF | 8 |
| Watchdog pulse slew rate | VWI | 5 | V/µs | From 20% to 80% VQ | 8 | ||
| Input voltage (operating) | VI | 6 | 40 | V | 6 | ||
| Junction temperature (operating) | Tj | -40 | 150 | °C | 6 | ||
| Input voltage | VI | -42 | 42 | V | 5 | ||
| Input voltage | VI | 65 | V | t ≤ 400 ms | 5 | ||
| Inhibit voltage | VINH | -42 | 42 | V | 5 | ||
| Inhibit voltage | VINH | 65 | V | t ≤ 400 ms | 5 | ||
| Reset output voltage | VRO | -0.3 | 42 | V | 5 | ||
| Reset delay voltage | VD | -0.3 | 7 | V | 5 | ||
| Reset delay current | ID | -5 | 5 | mA | 5 | ||
| Watchdog voltage | VW | -0.3 | 7 | V | 5 | ||
| Watchdog current | IW | -5 | 5 | mA | 5 | ||
| Output voltage | VQ | -1 | 16 | V | 5 | ||
| Output current | IQ | -5 | mA | Internally limited | 5 | ||
| Ground current | IGND | -0.5 | A | 5 | |||
| Junction temperature | Tj | 150 | °C | 5 | |||
| Storage temperature | Tstg | -50 | 150 | °C | 5 | ||
| Thermal resistance junction ambient | Rthja | 65 | K/W | 6 | |||
| Thermal resistance junction ambient | Rthja | 70 | K/W | PG-TO263-7 | 6 | ||
| Thermal resistance junction case | Rthjc | 3 | K/W | 6 | |||
| Thermal impedance junction case | Zthjc | 2 | K/W | t < 1 ms | 6 | ||
| Current consumption Iq = II | Iq | 800 | µA | VINH = 5 V; IQ = 0 mA | 7 | ||
| Reset saturation voltage | VRO,SAT | 60 | mV | Rintern = 30 kΩ; VQ = 1.0 V to 4.5 V | 7 | ||
| Power supply ripple rejection | PSRR | 54 | dB | ƒr = 100 Hz; Vr = 0.5 Vpp | 7 |
CAD (KiCad official)
- Symbol:
TLE42712GATMA1 - Footprint:
Package_TO_SOT_SMD:TO-263-7_TabPin8 - 3D model: TO-263-7 (KiCad packages3D, STEP)
- 3D model files:
tle42712gatma1-etched.step/tle42712gatma1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tle42712gatma1.step/tle42712gatma1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (20 pp, sha256
d8cd9621092021f2, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLE42712GATMA1
**Infineon Technologies** · Linear Voltage Regulators (LDO) · TO-263-7
TLE42712GATMA1 from Infineon Technologies, in a TO-263-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I | power_in | Input supply, operating range 6 V to 40 V (abs max -42 V to 42 V, 65 V for t ≤ 400 ms); block to ground directly at the IC with a ceramic capacitor. |
| 2 | INH | input | Inhibit input that switches the regulator off when below the turn-off voltage (VL,INH 0.8 V to 3.3 V) and on above the turn-on voltage (VU,INH 1.0 V to 3.5 V); abs max -42 V to 42 V. |
| 3 | RO | output | Reset output, open collector connected to the 5 V output via an integrated 30 kΩ resistor. |
| 4 | GND | power_in | Ground. |
| 5 | D | passive | Reset delay pin; connect a capacitor to ground to set the reset delay and watchdog timing (abs max -0.3 V to 7 V). |
| 6 | WI | input | Watchdog input monitoring the connected controller, with rising edges required within the watchdog period to avoid reset (abs max -0.3 V to 7 V). |
| 7 | Q | power_out | 5 V regulated output (4.90 V to 5.10 V); block to ground with a 22 µF capacitor, ESR < 3 Ω. |
| 8 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-263-7 |
| Category | Power Supply Chip |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VQ | 4.9 | 5 | 5.1 | V | IQ = 5 mA to 550 mA; VI = 6 V to 26 V | 7 |
| Output current limiting | IQmax | 650 | 800 | | mA | VQ = 0 V | 7 |
| Current consumption Iq = II | Iq | | | 6 | µA | VINH = 0 V; IQ = 0 mA | 7 |
| Current consumption Iq = II - IQ | Iq | | 1 | 1.5 | mA | IQ = 5 mA | 7 |
| Current consumption Iq = II - IQ | Iq | | 55 | 75 | mA | IQ = 550 mA | 7 |
| Current consumption Iq = II - IQ | Iq | | 70 | 90 | mA | IQ = 550 mA; VI = 5 V | 7 |
| Drop voltage | Vdr | | 350 | 700 | mV | IQ = 550 mA | 7 |
| Load regulation | ∆VQ | | 25 | 50 | mV | IQ = 5 mA to 550 mA; VI = 6 V | 7 |
| Supply voltage regulation | ∆VQ | | 12 | 25 | mV | VI = 6 V to 26 V; IQ = 5 mA | 7 |
| Reset switching threshold | VRT | 4.5 | 4.65 | 4.8 | V | | 7 |
| Reset high voltage | VROH | 4.5 | | | V | | 7 |
| Reset saturation voltage | VRO,SAT | | 200 | 400 | mV | IR = 3 mA; VQ = 4.4 V | 7 |
| Reset pull-up | R | 18 | 30 | 46 | kΩ | Internally connected to Q | 7 |
| Lower reset timing threshold | VLD | 0.2 | 0.45 | 0.8 | V | VQ < VRT | 7 |
| Charge current | ID | 8 | 14 | 25 | µA | VD = 1.0 V | 7 |
| Upper timing threshold | VUD | 1.4 | 1.8 | 2.3 | V | | 7 |
| Delay time | tD | 8 | 13 | 18 | ms | CD = 100 nF | 7 |
| Reset reaction time | tRR | | | 3 | µs | CD = 100 nF | 7 |
| Overvoltage turn-off voltage | VI,ov | 40 | 44 | 46 | V | | 8 |
| Inhibit turn-on voltage | VU,INH | 1 | 2 | 3.5 | V | VQ = high (> 4.5 V) | 8 |
| Inhibit turn-off voltage | VL,INH | 0.8 | 1.3 | 3.3 | V | VQ = low (< 0.8 V) | 8 |
| Inhibit current | IINH | 8 | 12 | 25 | µA | VINH = 5 V | 8 |
| Upper watchdog switching threshold | VUDW | 1.4 | 1.8 | 2.3 | V | | 8 |
| Lower watchdog switching threshold | VLDW | 0.2 | 0.45 | 0.8 | V | | 8 |
| Watchdog discharge current | IDWD | 1.5 | 2.7 | 3.5 | µA | VD = 1 V | 8 |
| Watchdog charge current | IDWC | 8 | 14 | 25 | µA | VD = 1 V | 8 |
| Watchdog period | tWD,P | 40 | 55 | 80 | ms | CD = 100 nF | 8 |
| Watchdog trigger time | tWI,tr | 30 | 45 | 66 | ms | CD = 100 nF | 8 |
| Watchdog pulse slew rate | VWI | 5 | | | V/µs | From 20% to 80% VQ | 8 |
| Input voltage (operating) | VI | 6 | | 40 | V | | 6 |
| Junction temperature (operating) | Tj | -40 | | 150 | °C | | 6 |
| Input voltage | VI | -42 | | 42 | V | | 5 |
| Input voltage | VI | | | 65 | V | t ≤ 400 ms | 5 |
| Inhibit voltage | VINH | -42 | | 42 | V | | 5 |
| Inhibit voltage | VINH | | | 65 | V | t ≤ 400 ms | 5 |
| Reset output voltage | VRO | -0.3 | | 42 | V | | 5 |
| Reset delay voltage | VD | -0.3 | | 7 | V | | 5 |
| Reset delay current | ID | -5 | | 5 | mA | | 5 |
| Watchdog voltage | VW | -0.3 | | 7 | V | | 5 |
| Watchdog current | IW | -5 | | 5 | mA | | 5 |
| Output voltage | VQ | -1 | | 16 | V | | 5 |
| Output current | IQ | -5 | | | mA | Internally limited | 5 |
| Ground current | IGND | -0.5 | | | A | | 5 |
| Junction temperature | Tj | | | 150 | °C | | 5 |
| Storage temperature | Tstg | -50 | | 150 | °C | | 5 |
| Thermal resistance junction ambient | Rthja | | | 65 | K/W | | 6 |
| Thermal resistance junction ambient | Rthja | | | 70 | K/W | PG-TO263-7 | 6 |
| Thermal resistance junction case | Rthjc | | | 3 | K/W | | 6 |
| Thermal impedance junction case | Zthjc | | | 2 | K/W | t < 1 ms | 6 |
| Current consumption Iq = II | Iq | | 800 | | µA | VINH = 5 V; IQ = 0 mA | 7 |
| Reset saturation voltage | VRO,SAT | | 60 | | mV | Rintern = 30 kΩ; VQ = 1.0 V to 4.5 V | 7 |
| Power supply ripple rejection | PSRR | | 54 | | dB | ƒr = 100 Hz; Vr = 0.5 Vpp | 7 |
## CAD (KiCad official)
- Symbol: `TLE42712GATMA1`
- Footprint: `Package_TO_SOT_SMD:TO-263-7_TabPin8`
- 3D model: TO-263-7 (KiCad packages3D, STEP)
- 3D model files: `tle42712gatma1-etched.step` / `tle42712gatma1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tle42712gatma1.step` / `tle42712gatma1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/2586/TLE%204271-2.pdf) (20 pp, sha256 `d8cd9621092021f2`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tle42712gatma1-datasheet.pdf)