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TLE2142ACDR

Texas Instruments · Operational Amplifier · SOIC-8

TLE2142ACDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Channel 1 output, nearly rail-to-rail swing of VCC− −0.1 V to VCC+ −1 V under light loading, short-circuit current limited internally, stable with capacitive loads up to 10 nF.
2 1IN− input Channel 1 inverting input, operates between VCC− −0.3 V and VCC+ −1.8 V without phase reversal.
3 1IN+ input Channel 1 noninverting input, operates between VCC− −0.3 V and VCC+ −1.8 V without phase reversal.
4 VCC− power_in Negative supply (ground in single-supply use); total supply range is 4 V to 44 V, or ±2 V to ±22 V split.
5 2IN+ input Channel 2 noninverting input, operates between VCC− −0.3 V and VCC+ −1.8 V without phase reversal.
6 2IN− input Channel 2 inverting input, operates between VCC− −0.3 V and VCC+ −1.8 V without phase reversal.
7 2OUT output Channel 2 output, nearly rail-to-rail swing of VCC− −0.1 V to VCC+ −1 V under light loading, short-circuit current limited internally, stable with capacitive loads up to 10 nF.
8 VCC+ power_in Positive supply; total supply range is 4 V to 44 V, or ±2 V to ±22 V split.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC+ VCC+ 22 V w.r.t. midpoint between VCC+ and VCC- 5
Supply voltage VCC- VCC- -22 V w.r.t. midpoint 5
Differential input voltage VID -44 44 V 5
Input current (each input) II -1 1 mA 5
Output current IO -80 80 mA 5
Total current into VCC+ 80 mA 5
Total current out of VCC- 80 mA 5
Storage temperature range Tstg -65 150 °C 5
Lead temperature 1.6 mm from case, 10 s 260 °C D package 5
Package thermal impedance, D package θJA 97.1 °C/W D package 5
Supply voltage VCC± -22 22 V C suffix, printed ±2 to ±22 5
Common-mode input voltage VIC 0 2.9 V VCC = 5 V, C suffix 5
Common-mode input voltage VIC -15 12.9 V VCC± = ±15 V, C suffix 5
Operating free-air temperature TA 0 70 °C C suffix 5
Input offset voltage VIO 200 1500 μV VCC=5 V, VO=2.5 V, VIC=2.5 V, RS=50 Ω, 25°C 10
Input offset voltage, full range VIO 1800 μV VCC=5 V, full range 0°C to 70°C 10
Input offset current IIO 8 100 nA VCC=5 V, 25°C 10
Input offset current, full range IIO 150 nA VCC=5 V, full range 10
Input bias current IIB -0.8 -2 μA VCC=5 V, 25°C 10
Common-mode input voltage range VICR 0 3 V VCC=5 V, RS=50 Ω, 25°C 10
High-level output voltage VOH 3.9 4.1 V VCC=5 V, IOH=-150 μA, 25°C 10
High-level output voltage VOH 3.8 4 V VCC=5 V, IOH=-1.5 mA, 25°C 10
High-level output voltage VOH 3.4 3.7 V VCC=5 V, IOH=-15 mA, 25°C 10
Low-level output voltage VOL 75 125 mV VCC=5 V, IOL=150 μA, 25°C 10
Low-level output voltage VOL 150 225 mV VCC=5 V, IOL=1.5 mA, 25°C 10
Low-level output voltage VOL 1.2 1.4 V VCC=5 V, IOL=15 mA, 25°C 10
Large-signal differential voltage amplification AVD 50 220 V/mV VCC=±2.5 V, RL=2 kΩ, VO=1 V to -1.5 V, 25°C 10
Common-mode rejection ratio CMRR 85 118 dB VCC=5 V, VIC=VICRmin, RS=50 Ω, 25°C 10
Supply-voltage rejection ratio kSVR 90 106 dB VCC±=±2.5 V to ±15 V, RS=50 Ω, 25°C 10
Supply current ICC 6.6 8.8 mA VCC=5 V, VO=2.5 V, no load, 25°C 10
Supply current, full range ICC 9.2 mA VCC=5 V, full range 10
Input offset voltage VIO 275 750 μV VCC±=±15 V, VIC=0, RS=50 Ω, 25°C 12
Input offset voltage, full range VIO 1200 μV VCC±=±15 V, full range 0°C to 70°C 12
Input offset current IIO 7 100 nA VCC±=±15 V, 25°C 12
Input offset current, full range IIO 150 nA VCC±=±15 V, full range 12
Input bias current IIB -0.7 -1.5 μA VCC±=±15 V, 25°C 12
Common-mode input voltage range VICR -15 13 V VCC±=±15 V, RS=50 Ω, 25°C 12
Maximum positive peak output voltage swing VOM+ 13.8 14.1 V IO=-150 μA, 25°C 12
Maximum positive peak output voltage swing VOM+ 13.7 14 V IO=-1.5 mA, 25°C 12
Maximum positive peak output voltage swing VOM+ 13.3 13.7 V IO=-15 mA, 25°C 12
Maximum negative peak output voltage swing VOM- -14.9 -14.7 V IO=150 μA, 25°C 12
Maximum negative peak output voltage swing VOM- -14.8 -14.5 V IO=1.5 mA, 25°C 12
Maximum negative peak output voltage swing VOM- -13.8 -13.4 V IO=15 mA, 25°C 12
Large-signal differential voltage amplification AVD 100 450 V/mV VO=±10 V, RL=2 kΩ, 25°C 12
Common-mode rejection ratio CMRR 85 108 dB VIC=VICRmin, RS=50 Ω, 25°C 12
Supply-voltage rejection ratio kSVR 90 106 dB VCC±=±2.5 V to ±15 V, RS=50 Ω, 25°C 12
Short-circuit output current IOS -25 -50 mA VO=0, VID=1 V, 25°C 12
Short-circuit output current IOS 20 31 mA VO=0, VID=-1 V, 25°C 12
Supply current ICC 6.9 9 mA VCC±=±15 V, VO=0, no load, 25°C 12
Supply current, full range ICC 9.4 mA VCC±=±15 V, VO=0, no load, full range 12
Positive slew rate SR+ 27 45 V/μs VCC±=±15 V, AVD=-1, RL=2 kΩ, CL=500 pF, TA=25°C 13
Negative slew rate SR- 27 42 V/μs VCC±=±15 V, AVD=1, RL=2 kΩ, CL=500 pF, TA=25°C 13
Temperature coefficient of input offset voltage αVIO 1.7 μV/°C VCC±=±15 V, VIC=0, RS=50 Ω, full range 12
Equivalent input noise voltage Vn 10.5 nV/√Hz VCC±=±15 V, RS=20 Ω, f=1 kHz 13
Unity-gain bandwidth B1 6 MHz VCC±=±15 V, RL=2 kΩ, CL=100 pF 13
Input resistance ri 65 MΩ VCC±=±15 V, 25°C 12
Input capacitance ci 2.5 pF VCC±=±15 V, 25°C 12

CAD (KiCad official)

  • Symbol: TLE2142ACDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tle2142acdr-etched.step / tle2142acdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2142acdr.step / tle2142acdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (84 pp, sha256 4993c88719fcb987, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF