component

TLE2142ACD

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentoperational amplifier-comparatortle2142acdfactory-2.0.0extractor-text

Verified TLE2142ACD

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLE2142ACD · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 84-page datasheet
  • ✓distributor: lcsc C2864256, digikey 296-10459-5-ND, mouser 595-TLE2142ACD
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-2x7tdg1a/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.73)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tle2142acd.kicad_sym✓ tle2142acd.kicad_mod✓ tle2142acd.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers tle2142acd: viewers · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago
tle2142acd-etched.glb Publish 0.1.0 · Ray 6d ago
tle2142acd-etched.step tle2142acd: factory component page (tier=mfr) · Ray 6d ago
tle2142acd-hero.glb tle2142acd: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
tle2142acd-hero.overlay.json Publish 0.1.0 · Ray 6d ago
tle2142acd.glb Publish 0.1.0 · Ray 6d ago
tle2142acd.kicad_mod Publish 0.1.0 · Ray 6d ago
tle2142acd.kicad_sym Publish 0.1.0 · Ray 6d ago
tle2142acd.lbr Publish 0.1.0 · Ray 6d ago
tle2142acd.step Publish 0.1.0 · Ray 6d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 6d ago

TLE2142ACD

Texas Instruments · Operational Amplifier · SOIC-8

TLE2142ACD from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier 1; the all-npn output stage swings nearly rail to rail, from VCC− +0.1 V to VCC+ − 1 V under light load, and can sustain shorts to either supply because output current is internally limited.
2 1IN− input Inverting input of amplifier 1; the common-mode input range is VCC− − 0.3 V to VCC+ − 1.8 V, and excessive input current may flow out of the input beyond the lower common-mode limit.
3 1IN+ input Non-inverting input of amplifier 1; the common-mode input range is VCC− − 0.3 V to VCC+ − 1.8 V without inducing phase reversal.
4 VCC− power_in Negative supply rail (ground in single-supply operation, or the negative rail in split supply); device operates from 4 V to 44 V single or split supply.
5 2IN+ input Non-inverting input of amplifier 2; the common-mode input range is VCC− − 0.3 V to VCC+ − 1.8 V without inducing phase reversal.
6 2IN− input Inverting input of amplifier 2; the common-mode input range is VCC− − 0.3 V to VCC+ − 1.8 V, and excessive input current may flow out of the input beyond the lower common-mode limit.
7 2OUT output Output of amplifier 2; the all-npn output stage swings nearly rail to rail, from VCC− +0.1 V to VCC+ − 1 V under light load, and can sustain shorts to either supply because output current is internally limited.
8 VCC+ power_in Positive supply rail; device operates from 4 V to 44 V single or split supply (±2 V to ±22 V split).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VIO 200 1500 μV VCC = 5 V, 25°C 10
Input offset voltage VIO 1800 μV VCC = 5 V, full range (0°C to 70°C) 10
Input offset current IIO 8 100 nA VO = 2.5 V, VIC = 2.5 V, RS = 50 Ω, 25°C 10
Input offset current IIO 150 nA VO = 2.5 V, VIC = 2.5 V, RS = 50 Ω, full range 10
Input bias current IIB -0.8 -2 μA VCC = 5 V, 25°C 10
Input bias current IIB -2.1 μA VCC = 5 V, full range 10
Common-mode input voltage range VICR -0.3 3.2 V VCC = 5 V, RS = 50 Ω, 25°C 10
Common-mode input voltage range VICR 0 2.9 V VCC = 5 V, RS = 50 Ω, full range 10
High-level output voltage VOH 3.9 4.1 V VCC = 5 V, IOH = −150 μA, 25°C 10
High-level output voltage VOH 3.8 V VCC = 5 V, IOH = −150 μA, full range 10
High-level output voltage VOH 3.4 3.7 V VCC = 5 V, IOH = −15 mA, 25°C 10
High-level output voltage VOH 3.4 V VCC = 5 V, IOH = −15 mA, full range 10
Low-level output voltage VOL 75 125 mV VCC = 5 V, IOL = 150 μA, 25°C 10
Low-level output voltage VOL 150 mV VCC = 5 V, IOL = 150 μA, full range 10
Low-level output voltage VOL 1.2 1.4 V VCC = 5 V, IOL = 15 mA, 25°C 10
Low-level output voltage VOL 1.5 V VCC = 5 V, IOL = 15 mA, full range 10
Large-signal differential voltage amplification AVD 50 220 V/mV VCC = ±2.5 V, RL = 2 kΩ, 25°C 10
Large-signal differential voltage amplification AVD 25 V/mV VCC = ±2.5 V, RL = 2 kΩ, VO = 1 V to −1.5 V, full range 10
Common-mode rejection ratio CMRR 85 118 dB VIC = VICRmin, RS = 50 Ω, 25°C 10
Supply-voltage rejection ratio kSVR 90 106 dB VCC± = ±2.5 V to ±15 V, RS = 50 Ω, 25°C 10
Supply current ICC 6.6 8.8 mA VO = 2.5 V, No load, 25°C 10
Supply current ICC 9.2 mA VO = 2.5 V, VIC = 2.5 V, No load, full range 10
Input offset voltage VIO 275 750 μV VCC± = ±15 V, 25°C 12
Input offset voltage VIO 1200 μV VCC± = ±15 V, full range 12
Input offset current IIO 7 100 nA VIC = 0, VO = 0, RS = 50 Ω, 25°C 12
Input offset current IIO 150 nA VIC = 0, VO = 0, RS = 50 Ω, full range 12
Input bias current IIB -0.7 -1.5 μA VCC± = ±15 V, 25°C 12
Input bias current IIB -1.6 μA VCC± = ±15 V, full range 12
Common-mode input voltage range VICR -15.3 13.2 V VCC± = ±15 V, RS = 50 Ω, 25°C 12
Common-mode input voltage range VICR -15.3 13.1 V VCC± = ±15 V, RS = 50 Ω, full range 12
Maximum positive peak output voltage swing VOM+ 13.8 14.1 V VCC± = ±15 V, IO = −150 μA, 25°C 12
Maximum positive peak output voltage swing VOM+ 13.7 V VCC± = ±15 V, IO = −150 μA, full range 12
Maximum positive peak output voltage swing VOM+ 13.3 13.7 V VCC± = ±15 V, IO = −15 mA, 25°C 12
Maximum positive peak output voltage swing VOM+ 13.2 V VCC± = ±15 V, IO = −15 mA, full range 12
Maximum negative peak output voltage swing VOM− -14.7 -14.9 V VCC± = ±15 V, IO = 150 μA, 25°C 12
Maximum negative peak output voltage swing VOM− -14.6 V VCC± = ±15 V, IO = 150 μA, full range 12
Maximum negative peak output voltage swing VOM− -13.4 -13.8 V VCC± = ±15 V, IO = 15 mA, 25°C 12
Maximum negative peak output voltage swing VOM− -13.3 V VCC± = ±15 V, IO = 15 mA, full range 12
Large-signal differential voltage amplification AVD 100 450 V/mV VO = ±10 V, RL = 2 kΩ, 25°C 12
Large-signal differential voltage amplification AVD 75 V/mV VO = ±10 V, RL = 2 kΩ, full range 12
Common-mode rejection ratio CMRR 85 108 dB VIC = VICRmin, RS = 50 Ω, 25°C 12
Supply-voltage rejection ratio kSVR 90 106 dB VCC± = ±2.5 V to ±15 V, RS = 50 Ω, 25°C 12
Short-circuit output current IOS -25 -50 mA VO = 0, VID = 1 V, 25°C 12
Short-circuit output current IOS 20 31 mA VO = 0, VID = −1 V, 25°C 12
Supply current ICC 6.9 9 mA VO = 0, No load, 25°C 12
Supply current ICC 9.4 mA VO = 0, No load, full range 12
Slew rate, positive SR+ 27 45 V/μs AVD = −1, RL = 2 kΩ, TA = 25°C 13
Slew rate, negative SR− 27 42 V/μs AVD = 1, CL = 500 pF, RL = 2 kΩ, TA = 25°C 13
Supply voltage, VCC+ VCC+ 22 V Referenced to supply midpoint (Note 1) 5
Supply voltage, VCC− VCC− -22 V Referenced to supply midpoint (Note 1) 5
Differential input voltage VID -44 44 V IN+ with respect to IN− (Note 2) 5
Input current (each input) II -1 1 mA Each input 5
Output current IO -80 80 mA 5
Storage temperature range -65 150 °C 5
Supply voltage VCC 2 22 V C suffix; split supply ±VCC 5
Common-mode input voltage VIC 0 2.9 V VCC = 5 V, C suffix 5
Common-mode input voltage VIC -15 12.9 V VCC± = ±15 V, C suffix 5
Operating free-air temperature TA 0 70 °C C suffix 5
Package thermal impedance, junction-to-ambient, D package θJA 97.1 °C/W D package; JESD 51-7 (Notes 4, 5) 5

CAD (KiCad official)

  • Symbol: TLE2142ACD
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tle2142acd-etched.step / tle2142acd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2142acd.step / tle2142acd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (84 pp, sha256 4993c88719fcb987, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF