component

TLE2082CP

Public Made by Adom

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Texas Instruments Pre-ordered Chips, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icstle2082cpfactory-2.0.0extractor-text

Verified TLE2082CP

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLE2082CP · PDIP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 82-page datasheet
  • ✓distributor: lcsc C1347356, digikey 2156-TLE2082CP-ND, mouser 595-TLE2082CP
  • ✓family: DIP-8_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-nlpgp7kd/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tle2082cp.kicad_sym✓ tle2082cp.kicad_mod✓ tle2082cp.step
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Ray Publish 0.1.0 0d3be26 10d ago

TLE2082CP

Texas Instruments · Pre-ordered Chips · PDIP-8

TLE2082CP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier 1 on the TLE2082 dual op amp, shown in the TOP VIEW pinout for the D, JG, or P package.
2 1IN- input Inverting input of amplifier 1.
3 1IN+ input Non-inverting input of amplifier 1.
4 VCC- power_in Negative supply rail for the amplifiers; the device is fully specified for dual supplies at ±15 V and ±5 V.
5 2IN+ input Non-inverting input of amplifier 2.
6 2IN- input Inverting input of amplifier 2.
7 2OUT output Output of amplifier 2.
8 VCC+ power_in Positive supply rail for the amplifiers; the device is fully specified for dual supplies at ±15 V and ±5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (25 °C, ±5 V) VIO 0.9 6 mV VIC = 0, VO = 0, RS = 50 Ω, TA = 25 °C 22
Input offset voltage (full range, ±5 V) VIO 8.1 mV VIC = 0, VO = 0, RS = 50 Ω, full range 0 to 70 °C 22
Temperature coefficient of input offset voltage (±5 V) αVIO 2.3 25 µV/°C RS = 50 Ω, full range 22
Input offset current (25 °C, ±5 V) IIO 5 100 pA VIC = 0, VO = 0, 25 °C 22
Input offset current (full range, ±5 V) IIO 1.4 nA VIC = 0, VO = 0, full range 22
Input bias current (25 °C, ±5 V) IIB 15 175 pA VIC = 0, VO = 0, see Figure 4, 25 °C 22
Input bias current (full range, ±5 V) IIB 5 nA VIC = 0, VO = 0, see Figure 4, full range 22
Maximum positive peak output voltage (±5 V) VOM+ 3.8 4.1 V IO = -200 µA, 25 °C 22
Maximum positive peak output voltage (±5 V) VOM+ 3.7 V IO = -200 µA, full range 22
Maximum positive peak output voltage (±5 V) VOM+ 3.5 3.9 V IO = -2 mA, 25 °C 22
Maximum positive peak output voltage (±5 V) VOM+ 3.4 V IO = -2 mA, full range 22
Maximum positive peak output voltage (±5 V) VOM+ 1.5 2.3 V IO = -20 mA, 25 °C 22
Maximum negative peak output voltage (±5 V) VOM- -4.2 -3.8 V IO = 200 µA, 25 °C 22
Maximum negative peak output voltage (±5 V) VOM- -3.7 V IO = 200 µA, full range 22
Maximum negative peak output voltage (±5 V) VOM- -4.1 -3.5 V IO = 2 mA, 25 °C 22
Maximum negative peak output voltage (±5 V) VOM- -3.4 V IO = 2 mA, full range 22
Maximum negative peak output voltage (±5 V) VOM- -2.4 -1.5 V IO = 20 mA, 25 °C 22
Large-signal differential voltage amplification (±5 V) AVD 80 91 dB RL = 600 Ω, 25 °C 22
Large-signal differential voltage amplification (±5 V) AVD 79 dB RL = 600 Ω, full range 22
Large-signal differential voltage amplification (±5 V) AVD 90 100 dB VO = ±2.3 V, RL = 2 kΩ, 25 °C 22
Large-signal differential voltage amplification (±5 V) AVD 89 dB VO = ±2.3 V, RL = 2 kΩ, full range 22
Large-signal differential voltage amplification (±5 V) AVD 95 106 dB RL = 10 kΩ, 25 °C 22
Large-signal differential voltage amplification (±5 V) AVD 94 dB RL = 10 kΩ, full range 22
Common-mode rejection ratio (±5 V) CMRR 70 89 dB VIC = VICRmin, VO = 0, RS = 50 Ω, 25 °C 22
Common-mode rejection ratio (±5 V) CMRR 68 dB VIC = VICRmin, VO = 0, RS = 50 Ω, full range 22
Supply-voltage rejection ratio (±5 V) kSVR 82 99 dB VCC± = ±5 V to ±15 V, VO = 0, RS = 50 Ω, 25 °C 22
Supply-voltage rejection ratio (±5 V) kSVR 80 dB VCC± = ±5 V to ±15 V, VO = 0, RS = 50 Ω, full range 22
Supply current, both channels (±5 V) ICC 2.7 2.9 3.9 mA VO = 0, no load, 25 °C 22
Supply current, both channels (±5 V) ICC 3.9 mA VO = 0, no load, full range 22
Positive slew rate (±5 V) SR+ 22 V/µs VO(PP) = ±2.3 V, AVD = 1, RL = 2 kΩ, full range 23
Negative slew rate (±5 V) SR- 22 V/µs AVD = -1, RL = 2 kΩ, CL = 100 pF, full range 23
Input offset voltage (25 °C, ±15 V) VIO 1.1 7 mV VIC = 0, VO = 0, RS = 50 Ω, 25 °C 24
Input offset voltage (full range, ±15 V) VIO 8.1 mV VIC = 0, VO = 0, RS = 50 Ω, full range 24
Temperature coefficient of input offset voltage (±15 V) αVIO 2.4 25 µV/°C RS = 50 Ω, full range 24
Input offset current (25 °C, ±15 V) IIO 6 100 pA VIC = 0, VO = 0, 25 °C 24
Input offset current (full range, ±15 V) IIO 1.4 nA VIC = 0, VO = 0, full range 24
Input bias current (25 °C, ±15 V) IIB 20 175 pA VIC = 0, VO = 0, see Figure 4, 25 °C 24
Input bias current (full range, ±15 V) IIB 5 nA VIC = 0, VO = 0, see Figure 4, full range 24
Maximum positive peak output voltage (±15 V) VOM+ 13.8 14.1 V IO = -200 µA, 25 °C 24
Maximum positive peak output voltage (±15 V) VOM+ 13.5 13.9 V IO = -2 mA, 25 °C 24
Maximum positive peak output voltage (±15 V) VOM+ 11.5 12.3 V IO = -20 mA, 25 °C 24
Maximum negative peak output voltage (±15 V) VOM- -14.2 -13.8 V IO = 200 µA, 25 °C 24
Maximum negative peak output voltage (±15 V) VOM- -14 -13.5 V IO = 2 mA, 25 °C 24
Maximum negative peak output voltage (±15 V) VOM- -12.4 -11.5 V IO = 20 mA, 25 °C 24
Large-signal differential voltage amplification (±15 V) AVD 80 96 dB RL = 600 Ω, 25 °C 24
Large-signal differential voltage amplification (±15 V) AVD 90 109 dB VO = ±10 V, RL = 2 kΩ, 25 °C 24
Large-signal differential voltage amplification (±15 V) AVD 95 118 dB RL = 10 kΩ, 25 °C 24
Common-mode rejection ratio (±15 V) CMRR 80 98 dB VIC = VICRmin, VO = 0, RS = 50 Ω, 25 °C 24
Supply-voltage rejection ratio (±15 V) kSVR 82 99 dB VCC± = ±5 V to ±15 V, VO = 0, RS = 50 Ω, 25 °C 24
Supply current, both channels (±15 V) ICC 2.7 3.1 3.9 mA VO = 0, no load, 25 °C 25
Supply current, both channels (±15 V) ICC 3.9 mA VO = 0, no load, full range 25
Positive slew rate (±15 V) SR+ 25 V/µs VO(PP) = 10 V, AVD = -1, RL = 2 kΩ, CL = 100 pF, full range 25
Negative slew rate (±15 V) SR- 25 V/µs RL = 2 kΩ, CL = 100 pF, full range 25
Supply voltage VCC± 2.25 19 V Magnitude of ± supply, C suffix 8
Common-mode input voltage range VIC -0.9 5 V VCC± = ±5 V, C suffix 8
Common-mode input voltage range VIC -10.9 15 V VCC± = ±15 V, C suffix 8
Operating free-air temperature TA 0 70 °C C suffix 8
Supply voltage VCC+ VCC+ 19 V With respect to midpoint of VCC+ and VCC- 8
Supply voltage VCC- VCC- -19 V With respect to midpoint of VCC+ and VCC- 8
Input current (each input) II -1 1 mA Each input 8
Output current (each output) IO -80 80 mA Each output 8
Storage temperature range Tstg -65 150 °C Storage 8
Continuous total dissipation, P package 1000 mW P package, TA ≤ 25 °C; derating 8.0 mW/°C above 25 °C 8

CAD (KiCad official)

  • Symbol: TLE2082CP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: tle2082cp-etched.step / tle2082cp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2082cp.step / tle2082cp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (82 pp, sha256 e46cf43acf6136e3, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF