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Contents

README

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TLE2072IDR

Texas Instruments · FET Input Amplifiers · SOIC-8

TLE2072IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier channel 1; capable of sourcing/sinking current with maximum peak swing limited by VOM+/VOM- specifications (e.g., typ 4.985V at IO=-200µA, VCC±=±5V) and short-circuit output current typ ±65mA.
2 1IN- input Inverting input of amplifier channel 1; JFET input with input bias current typ 15pA (25°C) and common-mode input voltage range up to the supply rail per VICR spec.
3 1IN+ input Non-inverting input of amplifier channel 1; JFET input with input bias current typ 15pA (25°C) and common-mode input voltage range up to the supply rail per VICR spec.
4 VCC- power_in Negative supply pin; recommended operating range ±2.25V to ±19V (dual supply) per Recommended Operating Conditions.
5 2IN+ input Non-inverting input of amplifier channel 2; JFET input with input bias current typ 15pA (25°C) and common-mode input voltage range up to the supply rail per VICR spec.
6 2IN- input Inverting input of amplifier channel 2; JFET input with input bias current typ 15pA (25°C) and common-mode input voltage range up to the supply rail per VICR spec.
7 2OUT output Output of amplifier channel 2; capable of sourcing/sinking current with maximum peak swing limited by VOM+/VOM- specifications (e.g., typ 4.985V at IO=-200µA, VCC±=±5V) and short-circuit output current typ ±65mA.
8 VCC+ power_in Positive supply pin; recommended operating range ±2.25V to ±19V (dual supply) per Recommended Operating Conditions.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

CAD (KiCad official)

  • Symbol: TLE2072IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tle2072idr-etched.step / tle2072idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2072idr.step / tle2072idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (79 pp, sha256 5c47b9f2c6963944, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF