component
TLE2071AQDRQ1
Public Made by Adomby adom
Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 4d ago |
| viewers | 4d ago |
| package.json | 4d ago |
| page.json | 4d ago |
| README.md | 4d ago |
| tle2071aqdrq1-etched.glb | 4d ago |
| tle2071aqdrq1-etched.step | 4d ago |
| tle2071aqdrq1-hero.glb | 4d ago |
| tle2071aqdrq1-hero.overlay.json | 4d ago |
| tle2071aqdrq1.glb | 4d ago |
| tle2071aqdrq1.kicad_mod | 4d ago |
| tle2071aqdrq1.kicad_sym | 4d ago |
| tle2071aqdrq1.lbr | 4d ago |
| tle2071aqdrq1.step | 4d ago |
| verification.json | 4d ago |
TLE2071AQDRQ1
Texas Instruments · Operational Amplifier · SOIC-8
TLE2071AQDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET N1 | passive | Offset null terminal for on-chip offset adjustment, available only on TLE2071x devices. |
| 2 | IN− | input | Inverting input of the operational amplifier. |
| 3 | IN+ | input | Noninverting input of the operational amplifier. |
| 4 | VCC− | power_in | Negative supply rail; the device is fully specified at ±15 V and ±5 V supplies. |
| 5 | OFFSET N2 | passive | Offset null terminal for on-chip offset adjustment, available only on TLE2071x devices. |
| 6 | OUT | output | Output of the operational amplifier. |
| 7 | VCC+ | power_in | Positive supply rail; the device is fully specified at ±15 V and ±5 V supplies. |
| 8 | NC | unconnected | No internal connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VCC+ | VCC+ | 19 | V | see Note 1 | 5 | ||
| Supply voltage VCC- | VCC- | -19 | V | see Note 1 | 5 | ||
| Input current (each input) | II | -1 | 1 | mA | 5 | ||
| Output current (each output) | IO | -80 | 80 | mA | 5 | ||
| Total current into VCC+ | 160 | mA | 5 | ||||
| Total current out of VCC- | 160 | mA | 5 | ||||
| Maximum junction temperature | TJ | 150 | °C | 5 | |||
| Package thermal impedance, D package | θJA | 126 | °C/W | see Note 4, JESD 51-7 | 5 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 5 | ||
| Lead temperature | 300 | °C | 1,6 mm from case for 3 seconds | 5 | |||
| Supply voltage | VCC± | -19 | 19 | V | printed as ±2.25 to ±19 | 5 | |
| Common-mode input voltage | VIC | -0.8 | 5 | V | VCC± = ±5 V | 5 | |
| Common-mode input voltage | VIC | -10.8 | 15 | V | VCC± = ±15 V | 5 | |
| Operating free-air temperature | TA | -40 | 125 | °C | 5 | ||
| Input offset voltage | VIO | 0.47 | 2 | mV | VCC± = ±15 V, VIC = 0, VO = 0, RS = 50 Ω, 25°C | 8 | |
| Input offset voltage | VIO | 7 | mV | VCC± = ±15 V, Full range | 8 | ||
| Temperature coefficient of input offset voltage | αVIO | 3.2 | 20 | µV/°C | VCC± = ±15 V, Full range | 8 | |
| Input offset current | IIO | 6 | 100 | pA | VCC± = ±15 V, VIC = 0, VO = 0, 25°C | 8 | |
| Input offset current | IIO | 20 | nA | VCC± = ±15 V, Full range | 8 | ||
| Input bias current | IIB | 20 | 175 | pA | VCC± = ±15 V, VIC = 0, VO = 0, 25°C | 8 | |
| Input bias current | IIB | 60 | nA | VCC± = ±15 V, Full range | 8 | ||
| Maximum positive peak output voltage swing | VOM+ | 13.8 | 14.1 | V | VCC± = ±15 V, IO = -200 µA, 25°C | 8 | |
| Maximum positive peak output voltage swing | VOM+ | 13.5 | 13.9 | V | VCC± = ±15 V, IO = -2 mA, 25°C | 8 | |
| Maximum positive peak output voltage swing | VOM+ | 11.5 | 12.3 | V | VCC± = ±15 V, IO = -20 mA, 25°C | 8 | |
| Maximum negative peak output voltage swing | VOM- | -13.8 | -14.2 | V | VCC± = ±15 V, IO = 200 µA, 25°C | 8 | |
| Maximum negative peak output voltage swing | VOM- | -13.5 | -14 | V | VCC± = ±15 V, IO = 2 mA, 25°C | 8 | |
| Maximum negative peak output voltage swing | VOM- | -11.5 | -12.4 | V | VCC± = ±15 V, IO = 20 mA, 25°C | 8 | |
| Large-signal differential voltage amplification | AVD | 80 | 96 | dB | VCC± = ±15 V, VO = ±10 V, RL = 600 Ω, 25°C | 8 | |
| Large-signal differential voltage amplification | AVD | 90 | 109 | dB | VCC± = ±15 V, VO = ±10 V, RL = 2 kΩ, 25°C | 8 | |
| Large-signal differential voltage amplification | AVD | 95 | 118 | dB | VCC± = ±15 V, VO = ±10 V, RL = 10 kΩ, 25°C | 8 | |
| Common-mode rejection ratio | CMRR | 80 | 98 | dB | VCC± = ±15 V, VIC = VICRmin, VO = 0, RS = 50 Ω, 25°C | 8 | |
| Supply-voltage rejection ratio | kSVR | 82 | 99 | dB | VCC± = ±5 V to ±15 V, VO = 0, RS = 50 Ω, 25°C | 8 | |
| Supply current | ICC | 1.35 | 1.7 | 2.2 | mA | VCC± = ±15 V, VO = 0, no load, 25°C | 9 |
| Short-circuit output current | IOS | -30 | -45 | mA | VCC± = ±15 V, VO = 0, VID = 1 V, 25°C | 9 | |
| Short-circuit output current | IOS | 30 | 48 | mA | VCC± = ±15 V, VO = 0, VID = -1 V, 25°C | 9 | |
| Positive slew rate | SR+ | 30 | 40 | V/µs | VCC± = ±15 V, VO(PP) = 10 V, AVD = -1, RL = 2 kΩ, CL = 100 pF, 25°C | 9 | |
| Negative slew rate | SR- | 30 | 45 | V/µs | VCC± = ±15 V, VO(PP) = 10 V, AVD = -1, RL = 2 kΩ, CL = 100 pF, 25°C | 9 | |
| Equivalent input noise voltage | Vn | 28 | 55 | nV/√Hz | VCC± = ±15 V, f = 10 Hz, RS = 20 Ω, 25°C | 9 | |
| Equivalent input noise voltage | Vn | 11.6 | 17 | nV/√Hz | VCC± = ±15 V, f = 10 kHz, RS = 20 Ω, 25°C | 9 | |
| Unity-gain bandwidth | B1 | 8 | 10 | MHz | VCC± = ±15 V, VI = 10 mV, RL = 2 kΩ, CL = 25 pF, 25°C | 9 | |
| Maximum output-swing bandwidth | BOM | 478 | 637 | kHz | VCC± = ±15 V, VO(PP) = 20 V, AVD = 1, RL = 2 kΩ, CL = 25 pF, 25°C | 9 | |
| Input offset voltage | VIO | 0.3 | 2 | mV | VCC± = ±5 V, VIC = 0, VO = 0, RS = 50 Ω, 25°C | 6 | |
| Input offset voltage | VIO | 7 | mV | VCC± = ±5 V, Full range | 6 | ||
| Input offset current | IIO | 5 | 100 | pA | VCC± = ±5 V, VIC = 0, VO = 0, 25°C | 6 | |
| Input bias current | IIB | 15 | 175 | pA | VCC± = ±5 V, VIC = 0, VO = 0, 25°C | 6 | |
| Maximum positive peak output voltage swing | VOM+ | 3.8 | 4.1 | V | VCC± = ±5 V, IO = -200 µA, 25°C | 6 | |
| Maximum positive peak output voltage swing | VOM+ | 3.5 | 3.9 | V | VCC± = ±5 V, IO = -2 mA, 25°C | 6 | |
| Maximum negative peak output voltage swing | VOM- | -3.8 | -4.2 | V | VCC± = ±5 V, IO = 200 µA, 25°C | 6 | |
| Large-signal differential voltage amplification | AVD | 90 | 100 | dB | VCC± = ±5 V, VO = ±2.3 V, RL = 2 kΩ, 25°C | 6 | |
| Common-mode rejection ratio | CMRR | 70 | 89 | dB | VCC± = ±5 V, VIC = VICRmin, VO = 0, RS = 50 Ω, 25°C | 6 | |
| Supply current | ICC | 1.35 | 1.6 | 2.2 | mA | VCC± = ±5 V, VO = 0, no load, 25°C | 7 |
| Short-circuit output current | IOS | -35 | mA | VCC± = ±5 V, VO = 0, VID = 1 V, 25°C | 7 | ||
| Short-circuit output current | IOS | 45 | mA | VCC± = ±5 V, VO = 0, VID = -1 V, 25°C | 7 |
CAD (KiCad official)
- Symbol:
TLE2071AQDRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tle2071aqdrq1-etched.step/tle2071aqdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tle2071aqdrq1.step/tle2071aqdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (44 pp, sha256
4e62f3c60a589499, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).