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TLE2071AQDRG4Q1
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Texas Instruments FET Input Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLE2071AQDRG4Q1
Texas Instruments · FET Input Amplifiers · SOIC-8
TLE2071AQDRG4Q1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET N1 | passive | Offset null terminal for input offset voltage adjustment, available only on the TLE2071x devices (this part). |
| 2 | IN− | input | Inverting input of the JFET-input operational amplifier, which provides the high input impedance the datasheet attributes to JFET-input stages. |
| 3 | IN+ | input | Non-inverting input of the JFET-input operational amplifier, which provides the high input impedance the datasheet attributes to JFET-input stages. |
| 4 | VCC− | power_in | Negative supply rail; the device is fully specified at ±15 V and ±5 V and supports rails up to ±19 V. |
| 5 | OFFSET N2 | passive | Offset null terminal for input offset voltage adjustment, available only on the TLE2071x devices (this part). |
| 6 | OUT | output | Amplifier output, which must be terminated to a virtual ground at mid-supply when used in single-supply operation. |
| 7 | VCC+ | power_in | Positive supply rail; the device is fully specified at ±15 V and ±5 V and supports rails up to ±19 V. |
| 8 | NC | unconnected | No internal connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TLE2071AQDRG4Q1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tle2071aqdrg4q1-etched.step/tle2071aqdrg4q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tle2071aqdrg4q1.step/tle2071aqdrg4q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (46 pp, sha256
136794139b529cbf, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLE2071AQDRG4Q1
**Texas Instruments** · FET Input Amplifiers · SOIC-8
TLE2071AQDRG4Q1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET N1 | passive | Offset null terminal for input offset voltage adjustment, available only on the TLE2071x devices (this part). |
| 2 | IN− | input | Inverting input of the JFET-input operational amplifier, which provides the high input impedance the datasheet attributes to JFET-input stages. |
| 3 | IN+ | input | Non-inverting input of the JFET-input operational amplifier, which provides the high input impedance the datasheet attributes to JFET-input stages. |
| 4 | VCC− | power_in | Negative supply rail; the device is fully specified at ±15 V and ±5 V and supports rails up to ±19 V. |
| 5 | OFFSET N2 | passive | Offset null terminal for input offset voltage adjustment, available only on the TLE2071x devices (this part). |
| 6 | OUT | output | Amplifier output, which must be terminated to a virtual ground at mid-supply when used in single-supply operation. |
| 7 | VCC+ | power_in | Positive supply rail; the device is fully specified at ±15 V and ±5 V and supports rails up to ±19 V. |
| 8 | NC | unconnected | No internal connection. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TLE2071AQDRG4Q1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tle2071aqdrg4q1-etched.step` / `tle2071aqdrg4q1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tle2071aqdrg4q1.step` / `tle2071aqdrg4q1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tle2071a-q1) (46 pp, sha256 `136794139b529cbf`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tle2071aqdrg4q1-datasheet.pdf)