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TLE2037CDR

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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page.json tle2037cdr: specified limits as data (metadata.characteristics, 58 rows from the datasheet) · Ray 14d ago
README.md tle2037cdr: specified limits as data (metadata.characteristics, 58 rows from the datasheet) · Ray 14d ago
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TLE2037CDR

Texas Instruments · Operational Amplifier · SOIC-8

TLE2037CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OFFSET N1 passive Offset null terminal 1 for input offset voltage adjustment; the datasheet gives no adjustment range or limit for this pin.
2 IN− input Inverting input of the operational amplifier.
3 IN+ input Noninverting input of the operational amplifier.
4 VCC− power_in Negative supply rail; the datasheet gives the supply range only in its electrical tables, not in the pinout text.
5 OFFSET N2 passive Offset null terminal 2 for input offset voltage adjustment; the datasheet gives no adjustment range or limit for this pin.
6 OUT output Amplifier output.
7 VCC+ power_in Positive supply rail; the datasheet gives the supply range only in its electrical tables, not in the pinout text.
8 NC unconnected No internal connection.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VCC+ (absolute maximum) VCC+ 19 V 5
Supply voltage, VCC− (absolute maximum) VCC− -19 V 5
Differential input voltage VID -1.2 1.2 V 5
Input current (each input) II -1 1 mA each input 5
Output current IO -50 50 mA 5
Total current into VCC+ 50 mA 5
Total current out of VCC− 50 mA 5
Storage temperature range Tstg -65 150 °C 5
Lead temperature (D or P package) 260 °C 1,6 mm (1/16 inch) from case for 10 seconds 5
Supply voltage (recommended) VCC± 4 19 V C suffix 5
Common-mode input voltage, TA = 25°C VIC -11 11 V TA = 25°C, C suffix 5
Common-mode input voltage, full range VIC -10.5 10.5 V Full range (0°C to 70°C), C suffix 5
Operating free-air temperature TA 0 70 °C C suffix 5
Power rating, D package 725 mW TA ≤ 25°C 5
Power rating, D package 464 mW TA = 70°C 5
Input offset voltage VIO 20 100 μV 25°C, VCC± = ±15 V 6
Input offset voltage VIO 145 μV Full range (0°C to 70°C) 6
Temperature coefficient of input offset voltage αVIO 0.4 1 μV/°C Full range (0°C to 70°C) 6
Input offset voltage long-term drift 0.006 1 μV/mo VIC = 0, RS = 50 Ω, 25°C 6
Input offset current IIO 6 90 nA 25°C 6
Input offset current IIO 150 nA Full range (0°C to 70°C) 6
Input bias current IIB 15 90 nA 25°C 6
Input bias current IIB 150 nA Full range (0°C to 70°C) 6
Common-mode input voltage range VICR -11 11 V RS = 50 Ω, 25°C 6
Common-mode input voltage range VICR -10.5 10.5 V RS = 50 Ω, Full range (0°C to 70°C) 6
Maximum positive peak output voltage swing VOM+ 10.5 12.9 V RL = 600 Ω, 25°C 6
Maximum positive peak output voltage swing VOM+ 10 V RL = 600 Ω, Full range (0°C to 70°C) 6
Maximum positive peak output voltage swing VOM+ 12 13.2 V RL = 2 kΩ, 25°C 6
Maximum positive peak output voltage swing VOM+ 11 V RL = 2 kΩ, Full range (0°C to 70°C) 6
Maximum negative peak output voltage swing VOM− -13 -10.5 V RL = 600 Ω, 25°C 6
Maximum negative peak output voltage swing VOM− -10 V RL = 600 Ω, Full range (0°C to 70°C) 6
Maximum negative peak output voltage swing VOM− -13.5 -12 V RL = 2 kΩ, 25°C 6
Maximum negative peak output voltage swing VOM− -11 V RL = 2 kΩ, Full range (0°C to 70°C) 6
Large-signal differential voltage amplification AVD 5 45 V/μV VO = ±11 V, RL = 2 kΩ, 25°C 6
Large-signal differential voltage amplification AVD 2 V/μV VO = ±10 V, RL = 2 kΩ, Full range (0°C to 70°C) 6
Large-signal differential voltage amplification AVD 3.5 38 V/μV VO = ±10 V, RL = 1 kΩ, 25°C 6
Large-signal differential voltage amplification AVD 1 V/μV VO = ±10 V, RL = 1 kΩ, Full range (0°C to 70°C) 6
Large-signal differential voltage amplification AVD 2 19 V/μV VO = ±10 V, RL = 600 Ω, 25°C 6
Large-signal differential voltage amplification AVD 0.5 V/μV VO = ±10 V, RL = 600 Ω, Full range (0°C to 70°C) 6
Common-mode rejection ratio CMRR 100 131 dB VIC = VICRmin, 25°C 6
Common-mode rejection ratio CMRR 98 dB VIC = VICRmin, RS = 50 Ω, Full range (0°C to 70°C) 6
Supply-voltage rejection ratio kSVR 94 144 dB VCC± = ±4 V to ±18 V, RS = 50 Ω, 25°C 6
Supply-voltage rejection ratio kSVR 92 dB VCC± = ±4 V to ±18 V, RS = 50 Ω, Full range (0°C to 70°C) 6
Supply current ICC 3.8 5.3 mA VO = 0, no load, 25°C 6
Supply current ICC 5.6 mA VO = 0, no load, Full range (0°C to 70°C) 6
Input capacitance Ci 8 pF 25°C 6
Open-loop output impedance zo 50 Ω IO = 0, 25°C 6
Slew rate at unity gain (TLE2037) SR 6 7.5 V/μs RL = 2 kΩ, CL = 100 pF, see Figure 1, 25°C 7
Slew rate at unity gain (TLE2037) SR 5 V/μs RL = 2 kΩ, CL = 100 pF, TA = 0°C to 70°C 7
Equivalent input noise voltage Vn 3.3 8 nV/√Hz RS = 20 Ω, f = 10 Hz 7
Equivalent input noise voltage Vn 2.5 4.5 nV/√Hz RS = 20 Ω, f = 1 kHz 7
Peak-to-peak equivalent input noise voltage VN(PP) 50 250 nV f = 0.1 Hz to 10 Hz 7
Equivalent input noise current In 10 25 pA/√Hz f = 10 Hz 7
Equivalent input noise current In 0.8 1.8 pA/√Hz f = 1 kHz 7
Total harmonic distortion (TLE2037) THD 0.002 % VO = +10 V, AVD = 5, see Note 5 (printed as <0.002%) 7
Gain bandwidth product (TLE2037) GBW 35 50 MHz RL = 2 kΩ, CL = 100 pF 7
Maximum output swing bandwidth (TLE2037) BOM 80 kHz RL = 2 kΩ 7
Phase margin at unity gain (TLE2037) φm 50 ° RL = 2 kΩ, CL = 100 pF 7

CAD (KiCad official)

  • Symbol: TLE2037CDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tle2037cdr-etched.step / tle2037cdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2037cdr.step / tle2037cdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 09399ea392ffdc06, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF