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TLE2022QDRQ1

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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viewers tle2022qdrq1: viewers · Ray 18d ago
package.json Publish 0.1.0 · Ray 18d ago
page.json tle2022qdrq1: specified limits as data (metadata.characteristics, 51 rows from the datasheet) · Ray 12d ago
README.md tle2022qdrq1: specified limits as data (metadata.characteristics, 51 rows from the datasheet) · Ray 12d ago
tle2022qdrq1-etched.glb tle2022qdrq1: factory component page (tier=lcsc) · Ray 18d ago
tle2022qdrq1-etched.step tle2022qdrq1: factory component page (tier=lcsc) · Ray 18d ago
tle2022qdrq1-hero.glb tle2022qdrq1: hero GLB from the etched model (keeps the MPN mark) · Ray 18d ago
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tle2022qdrq1.step Publish 0.1.0 · Ray 18d ago

TLE2022QDRQ1

Texas Instruments · Operational Amplifier · SOIC-8

TLE2022QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of channel A.
2 -IN A input Inverting input of channel A.
3 +IN A input Non-inverting input of channel A.
4 V- power_in Negative power supply.
5 +IN B input Non-inverting input of channel B.
6 -IN B input Inverting input of channel B.
7 OUT B output Output of channel B.
8 V+ power_in Positive power supply.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (VCC ±15V, 25°C) VIO -500 150 500 µV RS = 50Ω 9
Input offset voltage (VCC ±15V, -40°C to +125°C) VIO -700 700 µV TA = -40°C 至 +125°C 9
Input offset voltage drift (VCC ±15V) dVIO/dT -2 2 2 µV/°C RS = 50Ω、TA = –40°C 至 +125°C 9
Input bias current (VCC ±15V, 25°C) IIB 35 70 nA RS = 50Ω 9
Input bias current (VCC ±15V, -40°C to +125°C) IIB 90 nA TA = -40°C 至 +125°C 9
Input offset current (VCC ±15V, 25°C) IIO 0.5 6 nA RS = 50Ω 9
Input offset current (VCC ±15V, -40°C to +125°C) IIO 10 nA TA = -40°C 至 +125°C 9
Power supply rejection ratio (VCC ±15V, 25°C) PSRR 100 115 dB VCC± = ±2.5V 至 ±15V 9
Power supply rejection ratio (VCC ±15V, -40°C to +125°C) PSRR 95 dB TA = -40°C 至 +125°C 9
Large-signal voltage gain (VCC ±15V, 25°C) AVD 0.8 4 V/µV VO = ±10V、RL = 10kΩ 9
Large-signal voltage gain (VCC ±15V, -40°C to +125°C) AVD 0.8 V/µV TA = -40°C 至 +125°C 9
Common-mode input voltage range, to positive rail (VCC ±15V, 25°C) VICR 13.5 14 V RS = 50Ω 9
Common-mode input voltage range, to positive rail (VCC ±15V, -40°C to +125°C) VICR 13.2 V TA = -40°C 至 +125°C 9
Common-mode input voltage range, to negative rail (VCC ±15V, 25°C) VICR -15.3 -15 V RS = 50Ω 9
Common-mode input voltage range, to negative rail (VCC ±15V, -40°C to +125°C) VICR -15 V TA = -40°C 至 +125°C 9
Common-mode rejection ratio (VCC ±15V, 25°C) CMRR 95 106 dB VIC = VICR 最小值、RS = 50Ω 9
Common-mode rejection ratio (VCC ±15V, -40°C to +125°C) CMRR 91 dB TA = -40°C 至 +125°C 9
Output voltage swing, positive rail (VCC ±15V, 25°C) VO 14 14.3 V RL = 10kΩ 9
Output voltage swing, positive rail (VCC ±15V, -40°C to +125°C) VO 13.8 V TA = -40°C 至 +125°C 9
Output voltage swing, negative rail (VCC ±15V, 25°C) VO -14.1 -13.7 V RL = 10kΩ 9
Output voltage swing, negative rail (VCC ±15V, -40°C to +125°C) VO -13.6 V TA = -40°C 至 +125°C 9
Supply current (VCC ±15V, 25°C) ICC 550 700 µA 无负载 9
Supply current (VCC ±15V, -40°C to +125°C) ICC 700 µA TA = -40°C 至 +125°C 9
Input offset voltage (VCC 5V, 25°C) VIO -600 600 µV RS = 50Ω 10
Input offset voltage (VCC 5V, -40°C to +125°C) VIO -800 800 µV TA = -40°C 至 +125°C 10
Input offset voltage drift (VCC 5V) dVIO/dT -2 2 2 µV/°C RS = 50Ω、TA = –40°C 至 +125°C 10
Input bias current (VCC 5V, 25°C) IIB 35 70 nA RS = 50Ω 10
Input bias current (VCC 5V, -40°C to +125°C) IIB 90 nA TA = -40°C 至 +125°C 10
Input offset current (VCC 5V, 25°C) IIO 0.5 6 nA RS = 50Ω 10
Input offset current (VCC 5V, -40°C to +125°C) IIO 10 nA TA = -40°C 至 +125°C 10
Power supply rejection ratio (VCC 5V, 25°C) PSRR 100 115 dB VCC = 5V 至 30V 10
Power supply rejection ratio (VCC 5V, -40°C to +125°C) PSRR 95 dB TA = -40°C 至 +125°C 10
Large-signal voltage gain (VCC 5V, 25°C) AVD 0.3 1.5 V/µV VO = 1.4V 至 4V、RL = 10kΩ 10
Large-signal voltage gain (VCC 5V, -40°C to +125°C) AVD 0.1 V/µV TA = -40°C 至 +125°C 10
Common-mode input voltage range, to positive rail (VCC 5V, 25°C) VICR 3.5 4 V RS = 50Ω 10
Common-mode input voltage range, to positive rail (VCC 5V, -40°C to +125°C) VICR 3.2 V TA = -40°C 至 +125°C 10
Common-mode input voltage range, to negative rail (VCC 5V, 25°C) VICR -0.3 0 V RS = 50Ω 10
Common-mode input voltage range, to negative rail (VCC 5V, -40°C to +125°C) VICR 0 V TA = -40°C 至 +125°C 10
Common-mode rejection ratio (VCC 5V, 25°C) CMRR 85 100 dB VIC = VICR 最小值、RS = 50Ω 10
Common-mode rejection ratio (VCC 5V, -40°C to +125°C) CMRR 80 dB TA = -40°C 至 +125°C 10
Output voltage swing, positive rail (VCC 5V, 25°C) VO 4 4.3 V RL = 10kΩ 10
Output voltage swing, positive rail (VCC 5V, -40°C to +125°C) VO 3.8 V TA = -40°C 至 +125°C 10
Output voltage swing, negative rail (VCC 5V, 25°C) VO 0.7 0.8 V RL = 10kΩ 10
Output voltage swing, negative rail (VCC 5V, -40°C to +125°C) VO 0.95 V TA = -40°C 至 +125°C 10
Supply current (VCC 5V, 25°C) ICC 450 600 µA 无负载 10
Supply current (VCC 5V, -40°C to +125°C) ICC 600 µA TA = -40°C 至 +125°C 10
Junction-to-ambient thermal resistance (D SOIC-8) RθJA 122.4 °C/W 6
Junction-to-case (top) thermal resistance (D SOIC-8) RθJC(top) 61.5 °C/W 6
Junction-to-board thermal resistance (D SOIC-8) RθJB 70 °C/W 6
Junction-to-top characterization parameter (D SOIC-8) ψJT 11.2 °C/W 6
Junction-to-board characterization parameter (D SOIC-8) ψJB 69.1 °C/W 6

CAD (KiCad official)

  • Symbol: TLE2022QDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tle2022qdrq1-etched.step / tle2022qdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2022qdrq1.step / tle2022qdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 454c6497ba68feb0, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF