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TLE2022AMDR

Texas Instruments · Pre-ordered Chips · SOIC-8

TLE2022AMDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of channel A; absolute maximum output current is ±30 mA per output for the TLE2022, and the output must not be shorted to VCC+.
2 -IN A input Inverting input of channel A; the differential input voltage should stay within about ±600 mV unless limiting resistance is used.
3 +IN A input Noninverting input of channel A; for the M-suffix device the common-mode input range is 0 V to 3.2 V on a 5 V supply and -15 V to 13.2 V on ±15 V.
4 VCC- power_in Negative supply (lowest potential); recommended supply is ±2 V to ±20 V for dual supply or 4 V to 40 V for single supply.
5 +IN B input Noninverting input of channel B; for the M-suffix device the common-mode input range is 0 V to 3.2 V on a 5 V supply and -15 V to 13.2 V on ±15 V.
6 -IN B input Inverting input of channel B; the differential input voltage should stay within about ±600 mV unless limiting resistance is used.
7 OUT B output Output of channel B; absolute maximum output current is ±30 mA per output for the TLE2022, and the output must not be shorted to VCC+.
8 VCC+ power_in Positive supply (highest potential); recommended supply is ±2 V to ±20 V for dual supply or 4 V to 40 V for single supply.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (±15V, TA=25°C) VIO -300 120 300 µV VCC±=±15V; RS=50Ω; TA=25°C 14
Input offset voltage (±15V, full temperature range) VIO -450 450 µV VCC±=±15V; RS=50Ω; TA=-55°C to +125°C 14
Input offset voltage drift (±15V) dVIO/dT -2 2 2 µV/°C VCC±=±15V; RS=50Ω; TA=-55°C to +125°C 14
Input bias current (±15V, 25°C) IIB 33 70 nA VCC±=±15V; RS=50Ω 14
Input bias current (±15V, full temperature range) IIB 90 nA VCC±=±15V; RS=50Ω; TA=-55°C to +125°C 14
Input offset current (±15V, 25°C) IIO 0.4 6 nA VCC±=±15V; RS=50Ω 14
Input offset current (±15V, full temperature range) IIO 10 nA VCC±=±15V; RS=50Ω; TA=-55°C to +125°C 14
Power-supply rejection ratio (±15V, 25°C) PSRR 103 118 dB VCC±=±2.5V to ±15V 15
Power-supply rejection ratio (±15V, full temperature range) PSRR 98 dB VCC±=±2.5V to ±15V; TA=-55°C to +125°C 15
Large-signal voltage gain (±15V, 25°C) AV 1 7 V/µV VCC±=±15V; RL=10kΩ, VO=±10V 15
Large-signal voltage gain (±15V, full temperature range) AV 1 V/µV VCC±=±15V; RL=10kΩ, VO=±10V; TA=-55°C to +125°C 15
Common-mode voltage, to positive rail (±15V, 25°C) VIC 13.5 14 V VCC±=±15V; To positive rail, RS=50Ω 15
Common-mode voltage, to positive rail (±15V, full temperature range) VIC 13.2 V VCC±=±15V; To positive rail, RS=50Ω; TA=-55°C to +125°C 15
Common-mode voltage, to negative rail (±15V, 25°C) VIC -15 -15.3 V VCC±=±15V; To negative rail, RS=50Ω 15
Common-mode voltage, to negative rail (±15V, full temperature range) VIC -15 V VCC±=±15V; To negative rail, RS=50Ω; TA=-55°C to +125°C 15
Common-mode rejection ratio (±15V, 25°C) CMRR 97 109 dB VCC±=±15V; VIC=VICRmin, RS=50Ω 16
Common-mode rejection ratio (±15V, full temperature range) CMRR 93 dB VCC±=±15V; VIC=VICRmin, RS=50Ω; TA=-55°C to +125°C 16
Output voltage swing, positive (±15V, 25°C) VO 14 14.3 V VCC±=±15V; RL=10kΩ; Positive 16
Output voltage swing, positive (±15V, full temperature range) VO 13.9 V VCC±=±15V; RL=10kΩ; Positive; TA=-55°C to +125°C 16
Output voltage swing, negative (±15V, 25°C) VO -14.1 -13.7 V VCC±=±15V; RL=10kΩ; Negative 16
Output voltage swing, negative (±15V, full temperature range) VO -13.6 V VCC±=±15V; RL=10kΩ; Negative; TA=-55°C to +125°C 16
Supply current (±15V, no load, 25°C) ICC 550 700 µA VCC±=±15V; No load 16
Supply current (±15V, no load, full temperature range) ICC 700 µA VCC±=±15V; No load; TA=-55°C to +125°C 16
Input offset voltage (5V, 25°C) VIO -400 400 µV VCC=5V; RS=50Ω 18
Input offset voltage (5V, full temperature range) VIO -550 550 µV VCC=5V; RS=50Ω; TA=-55°C to +125°C 18
Input bias current (5V, 25°C) IIB 33 70 nA VCC=5V; RS=50Ω 18
Input bias current (5V, full temperature range) IIB 90 nA VCC=5V; RS=50Ω; TA=-55°C to +125°C 18
Input offset current (5V, 25°C) IIO 0.4 6 nA VCC=5V; RS=50Ω 18
Input offset current (5V, full temperature range) IIO 10 nA VCC=5V; RS=50Ω; TA=-55°C to +125°C 18
Power-supply rejection ratio (5V, 25°C) PSRR 103 118 dB VCC=5V to 30V 19
Power-supply rejection ratio (5V, full temperature range) PSRR 98 dB VCC=5V to 30V; TA=-55°C to +125°C 19
Large-signal voltage gain (5V, 25°C) AV 0.4 1.5 V/µV VCC=5V; RL=10kΩ, 1.4V≤VO≤4V 19
Large-signal voltage gain (5V, full temperature range) AV 0.1 V/µV VCC=5V; RL=10kΩ, 1.4V≤VO≤4V; TA=-55°C to +125°C 19
Common-mode input voltage range, to positive rail (5V, 25°C) VICR 3.5 4 V VCC=5V; To positive rail, RS=50Ω 19
Common-mode input voltage range, to positive rail (5V, full temperature range) VICR 3.2 V VCC=5V; To positive rail, RS=50Ω; TA=-55°C to +125°C 19
Common-mode input voltage range, to negative rail (5V, 25°C) VICR 0 -0.3 V VCC=5V; To negative rail, RS=50Ω 19
Common-mode input voltage range, to negative rail (5V, full temperature range) VICR 0 V VCC=5V; To negative rail, RS=50Ω; TA=-55°C to +125°C 19
Common-mode rejection ratio (5V, 25°C) CMRR 87 102 dB VCC=5V; VIC=VICRmin, RS=50Ω 19
Common-mode rejection ratio (5V, full temperature range) CMRR 82 dB VCC=5V; VIC=VICRmin, RS=50Ω; TA=-55°C to +125°C 19
Output voltage swing, positive (5V, 25°C) VO 4 4.3 V VCC=5V; RL=10kΩ; Positive 20
Output voltage swing, positive (5V, full temperature range) VO 3.8 V VCC=5V; RL=10kΩ; Positive; TA=-55°C to +125°C 20
Output voltage swing, negative (5V, 25°C) VO 0.7 0.8 V VCC=5V; RL=10kΩ; Negative 20
Output voltage swing, negative (5V, full temperature range) VO 0.95 V VCC=5V; RL=10kΩ; Negative; TA=-55°C to +125°C 20
Supply current (5V, 25°C) ICC 450 600 µA 20
Supply current (5V, full temperature range) ICC 600 µA TA=-55°C to +125°C 20
Supply voltage, dual supply (recommended) VCC 2 20 V Dual supply, VCC=(VCC+)-(VCC-) 6
Supply voltage, single supply (recommended) VCC 4 40 V Single supply 6
Common-mode input voltage, VCC=5V, M suffix (recommended) VIC 0 3.2 V VCC=5V, I and M suffix 6
Common-mode input voltage, VCC±=±15V, M suffix (recommended) VIC -15 13.2 V VCC±=±15V, I and M suffix 6
Operating free-air temperature, M suffix (recommended) TA -55 125 °C M suffix 6
Supply voltage, positive (absolute maximum) VCC+ 20 V 6
Supply voltage, negative (absolute maximum) VCC- -20 V 6
Differential input voltage (absolute maximum) VID -0.6 0.6 V 6
Input current, each input (absolute maximum) II -1 1 mA Each input 6
Output current, each output, TLE2022 (absolute maximum) IO -30 30 mA Each output, TLE2022 6
Operating free-air temperature, M suffix (absolute maximum) TA -55 150 °C M suffix 6
Storage temperature (absolute maximum) Tstg -65 150 °C 6
Junction-to-ambient thermal resistance, TLE2022 D (SOIC) 8-pin RθJA 122.4 ℃/W TLE2022 D (SOIC), 8 pins 7
Junction-to-case (top) thermal resistance, TLE2022 D (SOIC) 8-pin RθJC(top) 61.5 ℃/W TLE2022 D (SOIC), 8 pins 7
Junction-to-board thermal resistance, TLE2022 D (SOIC) 8-pin RθJB 70 ℃/W TLE2022 D (SOIC), 8 pins 7

CAD (KiCad official)

  • Symbol: TLE2022AMDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tle2022amdr-etched.step / tle2022amdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2022amdr.step / tle2022amdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (57 pp, sha256 8e287cc732a67667, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF