component

TLE2021IP

Public Made by Adom

by adom

Texas Instruments Precision OpAmps, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierstle2021ipfactory-2.0.0extractor-text

Verified TLE2021IP

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLE2021IP · PDIP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 80-page datasheet
  • ✓distributor: lcsc C1348326, digikey 2156-TLE2021IP-ND, mouser 595-TLE2021IP
  • ✓family: DIP-8_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-uzdtof5g/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tle2021ip.kicad_sym✓ tle2021ip.kicad_mod✓ tle2021ip.step
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Ray Publish 0.1.0 0c22180 3d ago

TLE2021IP

Texas Instruments · Precision OpAmps · PDIP-8

TLE2021IP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OFFSET N1 passive Offset null input 1, used together with OFFSET N2 to trim the input offset voltage.
2 IN− input Inverting input of the operational amplifier.
3 IN+ input Noninverting input of the operational amplifier.
4 VCC−/GND power_in Negative supply rail or ground for single-supply operation, and internally connected to the backside of the chip.
5 OFFSET N2 passive Offset null input 2, used together with OFFSET N1 to trim the input offset voltage.
6 OUT output Amplifier output.
7 VCC+ power_in Positive supply rail.
8 NC unconnected No internal connection.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC+ VCC+ 20 V see Note 1 8
Supply voltage VCC- VCC- -20 V see Note 1 8
Differential input voltage VID -0.6 0.6 V see Note 2 8
Input current (each input) II -1 1 mA 8
Output current TLE2021 IO -20 20 mA each output 8
Total current into VCC+ 80 mA 8
Total current out of VCC- 80 mA 8
Storage temperature Tstg -65 150 °C 8
Lead temperature, P package 260 °C 1,6 mm from case for 10 seconds 8
Operating free-air temperature, I suffix TA -40 85 °C I suffix 8
Supply voltage VCC -20 20 V printed ±2 to ±20, I suffix 8
Common-mode input voltage VIC 0 3.2 V VCC = ±5 V, I suffix 8
Common-mode input voltage VIC -15 13.2 V VCC± = ±15 V, I suffix 8
Operating free-air temperature TA -40 85 °C I suffix 8
Power rating P-8 1000 mW TA ≤ 25°C 8
Derating factor P-8 8 mW/°C above TA = 25°C 8
Input offset voltage VIO 120 600 μV VCC = 5 V, TA = 25°C 15
Input offset voltage VIO 950 μV VCC = 5 V, full range -40°C to 85°C 15
Temp coefficient of input offset voltage αVIO 2 μV/°C VCC = 5 V, full range 15
Input offset current IIO 0.2 6 nA VCC = 5 V, VIC = 0, RS = 50 Ω, 25°C 15
Input offset current IIO 10 nA VCC = 5 V, full range 15
Input bias current IIB 25 70 nA VCC = 5 V, 25°C 15
Input bias current IIB 90 nA VCC = 5 V, full range 15
Common-mode input voltage range VICR 0 3.5 V VCC = 5 V, RS = 50 Ω, 25°C 15
Common-mode input voltage range VICR 0 3.2 V VCC = 5 V, RS = 50 Ω, full range 15
High-level output voltage VOH 4 4.3 V VCC = 5 V, RL = 10 kΩ, 25°C 15
High-level output voltage VOH 3.9 V VCC = 5 V, RL = 10 kΩ, full range 15
Low-level output voltage VOL 0.7 0.8 V VCC = 5 V, RL = 10 kΩ, 25°C 15
Low-level output voltage VOL 0.9 V VCC = 5 V, RL = 10 kΩ, full range 15
Large-signal differential voltage amplification AVD 0.3 1.5 V/μV VCC = 5 V, VO = 1.4 V to 4 V, RL = 10 kΩ, 25°C 15
Large-signal differential voltage amplification AVD 0.25 V/μV VCC = 5 V, VO = 1.4 V to 4 V, RL = 10 kΩ, full range 15
Common-mode rejection ratio CMRR 85 110 dB VCC = 5 V, VIC = VICRmin, RS = 50 Ω, 25°C 15
Common-mode rejection ratio CMRR 80 dB VCC = 5 V, full range 15
Supply-voltage rejection ratio kSVR 105 120 dB VCC = 5 V to 30 V, 25°C 15
Supply-voltage rejection ratio kSVR 100 dB VCC = 5 V to 30 V, full range 15
Supply current ICC 200 300 μA VCC = 5 V, VO = 2.5 V, No load, 25°C 15
Supply current ICC 300 μA VCC = 5 V, VO = 2.5 V, No load, full range 15
Input offset voltage VIO 120 500 μV VCC = ±15 V, 25°C 16
Input offset voltage VIO 850 μV VCC = ±15 V, full range -40°C to 85°C 16
Input offset current IIO 0.2 6 nA VCC = ±15 V, 25°C 16
Input bias current IIB 25 70 nA VCC = ±15 V, 25°C 16
Input bias current IIB 90 nA VCC = ±15 V, full range 16
Common-mode input voltage range VICR -15 13.5 V VCC = ±15 V, RS = 50 Ω, 25°C 16
Common-mode input voltage range VICR -15 13.2 V VCC = ±15 V, RS = 50 Ω, full range 16
Maximum positive peak output voltage swing VOM+ 14 14.3 V VCC = ±15 V, RL = 10 kΩ, 25°C 16
Maximum positive peak output voltage swing VOM+ 13.9 V VCC = ±15 V, RL = 10 kΩ, full range 16
Maximum negative peak output voltage swing VOM- -13.7 -14.1 V VCC = ±15 V, RL = 10 kΩ, 25°C 16
Maximum negative peak output voltage swing VOM- -13.6 V VCC = ±15 V, RL = 10 kΩ, full range 16
Large-signal differential voltage amplification AVD 1 6.5 V/μV VCC = ±15 V, RL = 10 kΩ, 25°C 16
Large-signal differential voltage amplification AVD 0.75 V/μV VCC = ±15 V, RL = 10 kΩ, full range 16
Common-mode rejection ratio CMRR 100 115 dB VCC = ±15 V, VIC = VICRmin, RS = 50 Ω, 25°C 16
Common-mode rejection ratio CMRR 96 dB VCC = ±15 V, full range 16
Supply-voltage rejection ratio kSVR 105 120 dB VCC± = ±2.5 V to ±15 V, 25°C 16
Supply-voltage rejection ratio kSVR 100 dB VCC± = ±2.5 V to ±15 V, full range 16
Supply current ICC 240 350 μA VCC = ±15 V, VO = 0 V, No load, 25°C 16
Supply current ICC 350 μA VCC = ±15 V, VO = 0 V, No load, full range 16
Slew rate at unity gain SR 0.45 0.65 V/μs VCC = ±15 V, VO = 1V to 3 V, See Figure 1, 25°C 27
Unity-gain bandwidth B1 2 MHz VCC = ±15 V, See Figure 3, 25°C 27

CAD (KiCad official)

  • Symbol: TLE2021IP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: tle2021ip-etched.step / tle2021ip-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tle2021ip.step / tle2021ip.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (80 pp, sha256 a65f64fb6a2a6fe9, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF