component
TLC7701QDR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 26d ago |
| viewers | 26d ago |
| package.json | 3d ago |
| page.json | 3d ago |
| README.md | 26d ago |
| tlc7701qdr-etched.glb | 3d ago |
| tlc7701qdr-etched.step | 3d ago |
| tlc7701qdr-hero.glb | 3d ago |
| tlc7701qdr-hero.overlay.json | 3d ago |
| tlc7701qdr.glb | 26d ago |
| tlc7701qdr.kicad_mod | 26d ago |
| tlc7701qdr.kicad_sym | 26d ago |
| tlc7701qdr.lbr | 26d ago |
| tlc7701qdr.step | 26d ago |
TLC7701QDR
Texas Instruments · Supervisor And Reset ICs · SOIC-8
TLC7701QDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONTROL | input | Control input for RESET/RESET polarity and memory-bank-select power-down control; VIH ≥ 0.7×VDD and VIL ≤ 0.2×VDD, and tying it to GND makes RESET act as active high. |
| 2 | RESIN | input | Active-low reset input that forces the reset outputs active; VIH ≥ 0.7×VDD and VIL ≤ 0.2×VDD. |
| 3 | CT | passive | External timing capacitor pin that sets the reset delay time td = 2.1 × 10^4 × CT (CT in farads, td in seconds). |
| 4 | GND | power_in | Ground reference for all voltages. |
| 5 | RESET | output | Active-low totem-pole reset output, asserted when SENSE is below threshold and held until the delay time td expires after SENSE recovers. |
| 6 | RESET | output | Active-high totem-pole reset output, complement of the active-low output, rated at IOH -2 mA and IOL 2 mA. |
| 7 | SENSE | input | Voltage sense input compared against the internal threshold (1.1 V for the TLC7701, customizable with two external resistors); input voltage range -0.3 to 7 V. |
| 8 | VDD | power_in | Supply voltage, 2 V to 6 V recommended (7 V absolute maximum), with RESET defined from VDD ≥ 1 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TLC7701QDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tlc7701qdr-etched.step/tlc7701qdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc7701qdr.step/tlc7701qdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
3147b2830d2531af, retrieved 2026-10-12, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).