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TLC7701MDREP
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLC7701MDREP
Texas Instruments · Supervisor And Reset ICs · SOIC-8
TLC7701MDREP from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONTROL | input | Power-down control input with VIH of 0.7×VDD and VIL of 0.2×VDD; tying it to GND makes RESET act as an active-high output. |
| 2 | RESIN | input | Reset input with VIH of 0.7×VDD and VIL of 0.2×VDD, and its maximum input transition rise and fall rate is 100 ns/V. |
| 3 | CT | passive | External timing capacitor pin that sets the reset delay as td = 2.1×10^4 × CT (CT in farads, td in seconds). |
| 4 | GND | power_in | Ground reference for all voltages in the device; all absolute maximum voltage values are specified with respect to GND. |
| 5 | RESET | output | Active-low reset totem-pole output that is asserted when SENSE falls below the threshold and held for the delay time td after SENSE returns above threshold. |
| 6 | RESET | output | Active-high reset totem-pole output that is the complement of the active-low RESET output, with the state defined from VDD ≥ 1 V. |
| 7 | SENSE | input | Monitored supply voltage input compared against the internal threshold VIT-; the input voltage range is -0.3 V to 7 V and the input current is limited by the stated IIK clamp rating. |
| 8 | VDD | power_in | Supply voltage input with a recommended range of 2 V to 6 V and an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TLC7701MDREP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tlc7701mdrep-etched.step/tlc7701mdrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc7701mdrep.step/tlc7701mdrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
080ca8ff1686c834, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLC7701MDREP
**Texas Instruments** · Supervisor And Reset ICs · SOIC-8
TLC7701MDREP from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONTROL | input | Power-down control input with VIH of 0.7×VDD and VIL of 0.2×VDD; tying it to GND makes RESET act as an active-high output. |
| 2 | RESIN | input | Reset input with VIH of 0.7×VDD and VIL of 0.2×VDD, and its maximum input transition rise and fall rate is 100 ns/V. |
| 3 | CT | passive | External timing capacitor pin that sets the reset delay as td = 2.1×10^4 × CT (CT in farads, td in seconds). |
| 4 | GND | power_in | Ground reference for all voltages in the device; all absolute maximum voltage values are specified with respect to GND. |
| 5 | RESET | output | Active-low reset totem-pole output that is asserted when SENSE falls below the threshold and held for the delay time td after SENSE returns above threshold. |
| 6 | RESET | output | Active-high reset totem-pole output that is the complement of the active-low RESET output, with the state defined from VDD ≥ 1 V. |
| 7 | SENSE | input | Monitored supply voltage input compared against the internal threshold VIT-; the input voltage range is -0.3 V to 7 V and the input current is limited by the stated IIK clamp rating. |
| 8 | VDD | power_in | Supply voltage input with a recommended range of 2 V to 6 V and an absolute maximum of 7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TLC7701MDREP`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tlc7701mdrep-etched.step` / `tlc7701mdrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc7701mdrep.step` / `tlc7701mdrep.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc77-ep) (21 pp, sha256 `080ca8ff1686c834`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlc7701mdrep-datasheet.pdf)