component
TLC7701IDR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
tlc7701idr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body…
1e309f7
3d ago
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{
"slug": "tlc7701idr",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"tlc7701idr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"tlc7701idr.kicad_sym",
"tlc7701idr.kicad_mod",
"tlc7701idr.glb",
"tlc7701idr.step",
"tlc7701idr.lbr",
"docs/hero.png",
"docs/tlc7701idr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"tlc7701idr-hero.glb",
"tlc7701idr-hero.overlay.json"
],
"component": {
"mpn": "TLC7701IDR",
"manufacturer": "Texas Instruments",
"package": "SOIC-8",
"pin_count": 8,
"category": "Power Management (PMIC)",
"subcategory": "Supervisor And Reset ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/tlc77",
"parts": {
"symbol": "tlc7701idr.kicad_sym",
"footprint": "tlc7701idr.kicad_mod",
"model_3d": "tlc7701idr-hero.glb",
"model_3d_plain": "tlc7701idr.glb",
"model_3d_step": "tlc7701idr-etched.step",
"model_3d_step_plain": "tlc7701idr.step",
"lbr": "tlc7701idr.lbr"
},
"distributor_links": {
"lcsc": "C2066310",
"digikey": "296-26764-2-ND",
"mouser": "595-TLC7701IDR"
},
"distributor_check": {
"checked_at": "2026-10-08T15:22:21Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-26764-2-ND",
"status": "found"
},
"mouser": {
"pn": "595-TLC7701IDR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "CONTROL",
"type": "input",
"description": "Control input driven by the memory bank select signal for static RAM power-down control; when tied to GND, RESET acts as active high, with input high level at least 0.7×VDD and low level at most 0.2×VDD."
},
{
"number": "2",
"name": "RESIN",
"type": "input",
"description": "Reset input (active low, shown with overbar) that forces the reset outputs active per the function table, with input high level at least 0.7×VDD and low level at most 0.2×VDD."
},
{
"number": "3",
"name": "CT",
"type": "passive",
"description": "Connection for the external delay capacitor that sets the delay time td = 2.1 × 10^4 × CT (CT in farads, td in seconds)."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference; all voltage values are with respect to GND."
},
{
"number": "5",
"name": "RESET",
"type": "output",
"description": "Active-low totem-pole reset output (overbar on RESET in the pinout), active when SENSE is below the threshold and until the delay time td has expired after SENSE returns above threshold."
},
{
"number": "6",
"name": "RESET",
"type": "output",
"description": "Active-high totem-pole reset output, defined from VDD ≥ 1 V, active when SENSE is below the threshold and until the delay time td has expired after SENSE returns above threshold."
},
{
"number": "7",
"name": "SENSE",
"type": "input",
"description": "Voltage sense input compared to the negative-going threshold VIT-; on the TLC7701 the threshold is 1.1 V and can be customized with two external resistors; input range -0.3 to 7 V."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage, 2 V to 6 V recommended (7 V absolute max), with a 0.1 µF ceramic bypass capacitor connected near the supply terminals."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text+vision",
"consensus_model": "claude-opus-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet has no pin-function table. Descriptions are inferred from the pinout drawing, the desc; MPN TLC7701IDR is the SOIC (D) 8-pin tape-and-reel part per the packaging addendum. The D, JG, P and",
"vision extraction: provenance cannot be text-verified; needs consensus"
],
"pages_sent": 38,
"cost_usd": 0.8425,
"at": "2026-10-08T15:22:06"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/tlc77",
"pages": 38,
"sha256": "3147b2830d2531af",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tlc7701idr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"sha256": "6dcfda4eab4ca5ea62516ab2552d7400eb2266e6945845c29987865067b345c6",
"checked": "2026-11-03",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}