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Contents

README

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TLC7628CDWR

Texas Instruments · Digital To Analog Converters (DACs) · SOIC-20-300mil

TLC7628CDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND power_in Analog ground terminal shared by both DACs (DACA and DACB), used as the ground reference for the analog outputs.
2 OUTA output DACA current output; output voltage to AGND is absolute-maximum rated at ±25 V.
3 RFBA passive DACA internal feedback resistor terminal for the external op-amp; feedback voltage to AGND is absolute-maximum rated at ±25 V.
4 REFA input DACA reference voltage input, specified for ±10 V with an input resistance of 5 to 20 kΩ to AGND.
5 DGND power_in Digital ground reference for the digital inputs; input voltage range is −0.3 V to VDD + 0.3 V referenced to DGND.
6 DACA/DACB input Control input that selects which DAC data latch (A or B) is loaded from the common 8-bit input port.
7 DB7 input Most significant bit (MSB) of the 8-bit data input port; TTL-compatible with VIH minimum 2.4 V and VIL maximum 0.8 V.
8 DB6 input Data bit 6 of the 8-bit common input port; TTL-compatible with VIH minimum 2.4 V and VIL maximum 0.8 V.
9 DB5 input Data bit 5 of the 8-bit common input port; TTL-compatible with VIH minimum 2.4 V and VIL maximum 0.8 V.
10 DB4 input Data bit 4 of the 8-bit common input port; TTL-compatible with VIH minimum 2.4 V and VIL maximum 0.8 V.
11 DB3 input Data bit 3 of the 8-bit common input port; setup time 25 ns and hold time 10 ns to WR per the recommended operating conditions.
12 DB2 input Data bit 2 of the 8-bit common input port; setup time 25 ns and hold time 10 ns to WR per the recommended operating conditions.
13 DB1 input Data bit 1 of the 8-bit common input port; setup time 25 ns and hold time 10 ns to WR per the recommended operating conditions.
14 DB0 input Least significant bit (LSB) of the 8-bit data input port; setup time 25 ns and hold time 10 ns to WR per the recommended operating conditions.
15 CS input Chip select; must be low for a write, with setup time 50 ns and hold time 0 ns, and when high the data inputs are disabled regardless of WR.
16 WR input Write strobe; pulse duration low minimum 50 ns, with CS and WR both low making the input latches transparent.
17 VDD power_in Positive supply, specified 10.8 V to 15.75 V and absolute-maximum rated at 17 V to AGND or DGND.
18 REFB input DACB reference voltage input, specified for ±10 V with an input resistance of 5 to 20 kΩ to AGND.
19 RFBB passive DACB internal feedback resistor terminal for the external op-amp; feedback voltage to AGND is absolute-maximum rated at ±25 V.
20 OUTB output DACB current output; output voltage to AGND is absolute-maximum rated at ±25 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category ADC/DAC/Data Conversion
Pins 20

CAD (KiCad official)

  • Symbol: TLC7628CDWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: tlc7628cdwr-etched.step / tlc7628cdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc7628cdwr.step / tlc7628cdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 ab9617ace291fd3c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF