component
TLC7528EDW
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLC7528EDW
Texas Instruments · Digital To Analog Converters (DAC) · SOIC-20-300mil
TLC7528EDW from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AGND | power_in | Analog ground reference; the voltage between AGND and DGND must not exceed ±VDD (absolute maximum ratings). |
| 2 | OUTA | output | DAC A voltage-mode output; output voltage must stay within ±25 V to AGND (absolute maximum). |
| 3 | RFBA | input | DAC A feedback connection; feedback voltage must stay within ±25 V to AGND (absolute maximum). |
| 4 | REFA | input | DAC A reference voltage input; recommended ±10 V, absolute maximum ±25 V to AGND. |
| 5 | DGND | power_in | Digital ground reference for the data and control inputs. |
| 6 | DACA/DACB | input | Selects which DAC data latch (A or B) is loaded; requires 50 ns minimum setup and 10 ns minimum hold time. |
| 7 | DB7 | input | Most significant data input bit (MSB) of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 8 | DB6 | input | Data input bit 6 of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 9 | DB5 | input | Data input bit 5 of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 10 | DB4 | input | Data input bit 4 of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 11 | DB3 | input | Data input bit 3 of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 12 | DB2 | input | Data input bit 2 of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 13 | DB1 | input | Data input bit 1 of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 14 | DB0 (LSB) | input | Least significant data input bit (LSB) of the common 8-bit input port; VIH minimum 2.4 V and VIL maximum 0.8 V at VDD = 5 V. |
| 15 | CS | input | Chip select input; requires 50 ns minimum setup time and 0 ns minimum hold time. |
| 16 | WR | input | Write strobe input; WR must be held low for at least 50 ns (tw(WR)) to load the selected DAC latch. |
| 17 | VDD | power_in | Positive supply, 5 V to 15 V nominal (recommended 4.75-5.25 V or 14.5-15.5 V); absolute maximum −0.3 V to 16.5 V to AGND or DGND. |
| 18 | REFB | input | DAC B reference voltage input; recommended ±10 V, absolute maximum ±25 V to AGND. |
| 19 | RFBB | input | DAC B feedback connection; feedback voltage must stay within ±25 V to AGND (absolute maximum). |
| 20 | OUTB | output | DAC B voltage-mode output; output voltage must stay within ±25 V to AGND (absolute maximum). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Data Acquisition |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TLC7528EDW - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
tlc7528edw-etched.step/tlc7528edw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc7528edw.step/tlc7528edw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
63cd9d470d8a8f3e, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).