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Contents

README

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TLC7524CDR

Texas Instruments · Digital To Analog Converters (DAC) · SOIC-16

TLC7524CDR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Primary analog current output of the R-2R ladder; connects to external op-amp summing junction; on-state switch capacitance 120 pF max (all inputs high), output leakage current ±400 nA max at VDD = 5 V.
2 OUT2 output Complementary analog current output; carries full reference current Iref when all digital inputs are low; output leakage current ±400 nA max at VDD = 5 V.
3 GND power_in Ground reference for the device and the R-2R ladder.
4 DB7 input Digital data input bit 7 (MSB); high-order decoded bit; VIH min 2.4 V, VIL max 0.8 V; input current IIH/IIL ±10 µA max; input capacitance 5 pF typ.
5 DB6 input Digital data input bit 6; VIH min 2.4 V, VIL max 0.8 V; input current ±10 µA max; input capacitance 5 pF typ.
6 DB5 input Digital data input bit 5; VIH min 2.4 V, VIL max 0.8 V; input current ±10 µA max; input capacitance 5 pF typ.
7 DB4 input Digital data input bit 4; VIH min 2.4 V, VIL max 0.8 V; input current ±10 µA max; input capacitance 5 pF typ.
8 DB3 input Digital data input bit 3; VIH min 2.4 V, VIL max 0.8 V; input current ±10 µA max; input capacitance 5 pF typ.
9 DB2 input Digital data input bit 2; VIH min 2.4 V, VIL max 0.8 V; input current ±10 µA max; input capacitance 5 pF typ.
10 DB1 input Digital data input bit 1; VIH min 2.4 V, VIL max 0.8 V; input current ±10 µA max; input capacitance 5 pF typ.
11 DB0 input Digital data input bit 0 (LSB); VIH min 2.4 V, VIL max 0.8 V; input current ±10 µA max; input capacitance 5 pF typ.
12 CS input Active-low chip select; when high, DB0-DB7 data inputs are disabled regardless of WR state; setup time tsu(CS) 40 ns min, hold time th(CS) 0 ns min.
13 WR input Active-low write control; when both CS and WR are low, input latches are transparent and analog output tracks data bus; pulse duration tw(WR) 40 ns min.
14 VDD power_in Positive supply voltage; 4.75 V to 5.25 V (5 V nominal) or 14.5 V to 15.5 V (15 V nominal); quiescent IDD 1 mA typ, 2 mA max at VDD = 5 V.
15 REF input Reference voltage input; range ±10 V max; input impedance 5 kΩ min to 20 kΩ max; also serves as analog output node in voltage-mode operation.
16 RFB passive Internal feedback resistor terminal; the on-chip resistor (matched to R-2R ladder) connects between RFB and OUT1 for use with an external op-amp to achieve accurate full-scale output.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: TLC7524CDR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: tlc7524cdr-etched.step / tlc7524cdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc7524cdr.step / tlc7524cdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 ce7ba0309086b44c, retrieved 2026-09-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF