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TLC7135CDW
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Texas Instruments Analog To Digital Converters (ADC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+64@@ -0,0 +1,64 @@+# TLC7135CDW++**Texas Instruments** · Analog To Digital Converters (ADC) · SOIC-28-300mil++TLC7135CDW from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC− | power_in | Negative power supply rail, −3 to −8 V recommended operating range. |+| 2 | REF | input | Reference voltage input, nominally 1 V, positive relative to ANLG COMMON. |+| 3 | ANLG COMMON | power_in | Analog circuit common reference, establishes baseline for analog measurements. |+| 4 | INT OUT | output | Integrator output voltage, ranges ±3.5 to ±4 V during conversion cycle. |+| 5 | AUTO ZERO | input | Auto-zero mode control signal for input buffer offset compensation. |+| 6 | BUFF OUT | output | Buffer amplifier output connected to integrator input. |+| 7 | Cref− | passive | Negative terminal of reference capacitor, typically 1 µF polypropylene. |+| 8 | Cref+ | passive | Positive terminal of reference capacitor, typically 1 µF polypropylene. |+| 9 | IN− | input | Differential analog input negative terminal, voltage range VCC− +1 V to VCC+ −0.5 V. |+| 10 | IN+ | input | Differential analog input positive terminal, voltage range VCC− +1 V to VCC+ −0.5 V. |+| 11 | VCC+ | power_in | Positive power supply rail, +4 to +6 V recommended operating range. |+| 12 | D5 | output | Most significant digit drive output for tens-of-thousands digit, active high for 200 clock pulses per digit. |+| 13 | B1 | output | Binary-coded-decimal output bit 1 (LSB), multiplexed with other BCD bits under STROBE control. |+| 14 | B2 | output | Binary-coded-decimal output bit 2, multiplexed with other BCD bits under STROBE control. |+| 15 | B4 | output | Binary-coded-decimal output bit 4, multiplexed with other BCD bits under STROBE control. |+| 16 | B8 | output | Binary-coded-decimal output bit 8 (MSB), multiplexed with other BCD bits under STROBE control. |+| 17 | D4 | output | Digit drive output for thousands digit, active high for 200 clock pulses per digit. |+| 18 | D3 | output | Digit drive output for hundreds digit, active high for 200 clock pulses per digit. |+| 19 | D2 | output | Digit drive output for tens digit, active high for 200 clock pulses per digit. |+| 20 | D1 | output | Least significant digit drive output for units digit, active high for 200 clock pulses per digit. |+| 21 | BUSY | output | Busy output signal, high during signal integrate and deintegrate phases, TTL-compatible. |+| 22 | CLK | input | Clock input, TTL-compatible, frequency range 0 Hz to 2 MHz, VIH = 2.8 V, VIL = 0.8 V. |+| 23 | POLARITY | output | Polarity output, high for positive input signal, low for negative, updates at deintegrate phase. |+| 24 | DGTL GND | power_in | Digital circuit ground return, separate from analog ground to minimize noise coupling. |+| 25 | RUN/HOLD | input | Run/Hold control input, TTL-compatible, low level initiates hold mode, positive pulse restarts measurement. |+| 26 | STROBE | input | Strobe input, negative-going pulses transfer BCD conversion data to external latches or microprocessors. |+| 27 | OVER RANGE | output | Over-range output signal, goes high when magnitude of differential input exceeds ±2 × Vref. |+| 28 | UNDER RANGE | output | Under-range output signal, goes high when conversion result ≤ 1800 counts (9% of 20,000 count full-scale). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-28-300mil |+| Category | Data Acquisition |+| Pins | 28 |++## CAD (KiCad official)++- Symbol: `TLC7135CDW`+- Footprint: `Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm`+- 3D model: SOIC-28-300mil (KiCad packages3D, STEP)+- 3D model files: `tlc7135cdw-etched.step` / `tlc7135cdw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc7135cdw.step` / `tlc7135cdw.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc7135) (17 pp, sha256 `89de1bb2c0ac6ea0`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlc7135cdw-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "tlc7135cdw",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tlc7135cdw.kicad_sym",+ "tlc7135cdw.kicad_mod",+ "tlc7135cdw.glb",+ "tlc7135cdw.step",+ "tlc7135cdw.lbr",+ "docs/hero.png",+ "docs/tlc7135cdw-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tlc7135cdw-hero.glb",+ "tlc7135cdw-hero.overlay.json"+ ],+ "component": {+ "mpn": "TLC7135CDW",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-28-300mil",+ "pin_count": 28,+ "category": "Data Acquisition",+ "subcategory": "Analog To Digital Converters (ADC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tlc7135",+ "parts": {+ "symbol": "tlc7135cdw.kicad_sym",+ "footprint": "tlc7135cdw.kicad_mod",+ "model_3d": "tlc7135cdw-hero.glb",+ "model_3d_plain": "tlc7135cdw.glb",+ "model_3d_step": "tlc7135cdw-etched.step",+ "model_3d_step_plain": "tlc7135cdw.step",+ "lbr": "tlc7135cdw.lbr"+ },+ "distributor_links": {+ "lcsc": 1549780,+ "digikey": "2156-TLC7135CDW-ND",+ "mouser": "595-TLC7135CDW"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T03:54:40Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "2156-TLC7135CDW-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TLC7135CDW",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VCC−",+ "type": "power_in",+ "description": "Negative power supply rail, −3 to −8 V recommended operating range."+ },+ {+ "number": "2",+ "name": "REF",+ "type": "input",+ "description": "Reference voltage input, nominally 1 V, positive relative to ANLG COMMON."+ },+ {+ "number": "3",+ "name": "ANLG COMMON",+ "type": "power_in",+ "description": "Analog circuit common reference, establishes baseline for analog measurements."+ },+ {+ "number": "4",+ "name": "INT OUT",+ "type": "output",+ "description": "Integrator output voltage, ranges ±3.5 to ±4 V during conversion cycle."+ },+ {+ "number": "5",+ "name": "AUTO ZERO",+ "type": "input",+ "description": "Auto-zero mode control signal for input buffer offset compensation."+ },+ {+ "number": "6",+ "name": "BUFF OUT",+ "type": "output",+ "description": "Buffer amplifier output connected to integrator input."+ },+ {+ "number": "7",+ "name": "Cref−",+ "type": "passive",+ "description": "Negative terminal of reference capacitor, typically 1 µF polypropylene."+ },+ {+ "number": "8",+ "name": "Cref+",+ "type": "passive",+ "description": "Positive terminal of reference capacitor, typically 1 µF polypropylene."+ },+ {+ "number": "9",+ "name": "IN−",+ "type": "input",+ "description": "Differential analog input negative terminal, voltage range VCC− +1 V to VCC+ −0.5 V."+ },+ {+ "number": "10",+ "name": "IN+",+ "type": "input",+ "description": "Differential analog input positive terminal, voltage range VCC− +1 V to VCC+ −0.5 V."+ },+ {+ "number": "11",+ "name": "VCC+",+ "type": "power_in",+ "description": "Positive power supply rail, +4 to +6 V recommended operating range."+ },+ {+ "number": "12",+ "name": "D5",+ "type": "output",+ "description": "Most significant digit drive output for tens-of-thousands digit, active high for 200 clock pulses per digit."+ },+ {+ "number": "13",+ "name": "B1",+ "type": "output",+ "description": "Binary-coded-decimal output bit 1 (LSB), multiplexed with other BCD bits under STROBE control."+ },+ {+ "number": "14",+ "name": "B2",+ "type": "output",+ "description": "Binary-coded-decimal output bit 2, multiplexed with other BCD bits under STROBE control."+ },+ {+ "number": "15",+ "name": "B4",+ "type": "output",+ "description": "Binary-coded-decimal output bit 4, multiplexed with other BCD bits under STROBE control."+ },+ {+ "number": "16",+ "name": "B8",+ "type": "output",+ "description": "Binary-coded-decimal output bit 8 (MSB), multiplexed with other BCD bits under STROBE control."+ },+ {+ "number": "17",+ "name": "D4",+ "type": "output",+ "description": "Digit drive output for thousands digit, active high for 200 clock pulses per digit."+ },+ {+ "number": "18",+ "name": "D3",+ "type": "output",+ "description": "Digit drive output for hundreds digit, active high for 200 clock pulses per digit."+ },+ {+ "number": "19",+ "name": "D2",+ "type": "output",+ "description": "Digit drive output for tens digit, active high for 200 clock pulses per digit."+ },+ {+ "number": "20",+ "name": "D1",+ "type": "output",+ "description": "Least significant digit drive output for units digit, active high for 200 clock pulses per digit."+ },+ {+ "number": "21",+ "name": "BUSY",+ "type": "output",+ "description": "Busy output signal, high during signal integrate and deintegrate phases, TTL-compatible."+ },+ {+ "number": "22",+ "name": "CLK",+ "type": "input",+ "description": "Clock input, TTL-compatible, frequency range 0 Hz to 2 MHz, VIH = 2.8 V, VIL = 0.8 V."+ },+ {+ "number": "23",+ "name": "POLARITY",+ "type": "output",+ "description": "Polarity output, high for positive input signal, low for negative, updates at deintegrate phase."+ },+ {+ "number": "24",+ "name": "DGTL GND",+ "type": "power_in",+ "description": "Digital circuit ground return, separate from analog ground to minimize noise coupling."+ },+ {+ "number": "25",+ "name": "RUN/HOLD",+ "type": "input",+ "description": "Run/Hold control input, TTL-compatible, low level initiates hold mode, positive pulse restarts measurement."+ },+ {+ "number": "26",+ "name": "STROBE",+ "type": "input",+ "description": "Strobe input, negative-going pulses transfer BCD conversion data to external latches or microprocessors."+ },+ {+ "number": "27",+ "name": "OVER RANGE",+ "type": "output",+ "description": "Over-range output signal, goes high when magnitude of differential input exceeds ±2 × Vref."+ },+ {+ "number": "28",+ "name": "UNDER RANGE",+ "type": "output",+ "description": "Under-range output signal, goes high when conversion result ≤ 1800 counts (9% of 20,000 count full-scale)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 17,+ "cost_usd": 0.1935,+ "at": "2026-10-06T03:54:22"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tlc7135",+ "pages": 17,+ "sha256": "89de1bb2c0ac6ea0",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 28,+ "described": 28,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}