component
TLC6C5912QDWRQ1
Public Made by Adomby adom
Texas Instruments LED Drivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLC6C5912QDWRQ1
Texas Instruments · LED Drivers · SOIC-20-300mil
TLC6C5912QDWRQ1 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin for the device, with a recommended supply range of 3 V to 5.5 V; TI recommends a 0.1 µF ceramic capacitor close to the pin. |
| 2 | SER IN | input | Serial-data input that loads into the internal shift register on each rising edge of SRCK. |
| 3 | DRAIN0 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 4 | DRAIN1 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 5 | DRAIN2 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 6 | DRAIN3 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 7 | DRAIN4 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 8 | DRAIN5 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 9 | CLR | input | Active-low shift register clear that clears all registers in the device when driven low; the storage register transfers data to the output buffer when CLR is high. |
| 10 | G | input | Active-low output enable: when low all drain channels are enabled according to the output-latch content, and when high all channels are off. |
| 11 | SER OUT | output | Serial-data output of the 12-bit shift register, shifted out on the falling edge of SRCK for cascading devices. |
| 12 | RCK | input | Storage register clock; data transfers from the shift register to the storage register on its rising edge. |
| 13 | DRAIN6 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 14 | DRAIN7 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 15 | DRAIN8 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 16 | DRAIN9 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 17 | DRAIN10 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 18 | DRAIN11 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 19 | SRCK | input | Serial shift-register clock; data transfers from SER IN into the serial shift register on each rising edge. |
| 20 | GND | power_in | Power ground and reference pin for the device, which must connect to the PCB ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | LED Drivers |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic supply voltage | VCC | 8 | V | 4 | |||
| Logic input voltage | VI | -0.3 | 8 | V | 4 | ||
| Power DMOS drain-to-source voltage | VDS | 42 | V | 4 | |||
| Operating ambient temperature | Top | 125 | °C | 4 | |||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 165 | °C | 4 | ||
| Human body model ESD | V(ESD) | -2000 | 2000 | V | HBM, per AEC Q100-002 | 4 | |
| Charged device model ESD | V(ESD) | -750 | 750 | V | CDM, per AEC Q100-011 | 4 | |
| Supply voltage | VCC | 3 | 5.5 | V | 4 | ||
| High-level input voltage | VIH | 2.4 | V | 4 | |||
| Low-level input voltage | VIL | 0.7 | V | 4 | |||
| Setup time, SER IN high before SRCK↑ | tsu | 15 | ns | 4 | |||
| Hold time, SER IN high after SRCK↑ | th | 15 | ns | 4 | |||
| Pulse duration | tw | 40 | ns | 4 | |||
| Operating case temperature | TC | -40 | 125 | °C | 4 | ||
| High-level output voltage, SER OUT | VOH | 4.9 | 4.99 | V | IOH = -20 μA, VCC = 5 V | 5 | |
| High-level output voltage, SER OUT | VOH | 4.5 | 4.69 | V | IOH = -4 mA, VCC = 5 V | 5 | |
| Low-level output voltage, SER OUT | VOL | 0.001 | 0.01 | V | IOH = 20 μA, VCC = 5 V | 5 | |
| Low-level output voltage, SER OUT | VOL | 0.25 | 0.4 | V | IOH = 4 mA, VCC = 5 V | 5 | |
| High-level input current | IIH | 0.2 | μA | VCC = 5 V, VI = VCC | 5 | ||
| Low-level input current | IIL | -0.2 | μA | VCC = 5 V, VI = 0 | 5 | ||
| Logic supply current, all outputs off | ICC | 0.1 | 1 | μA | VCC = 5 V, No clock signal, All outputs off | 5 | |
| Logic supply current, all outputs on | ICC | 130 | 170 | μA | VCC = 5 V, No clock signal, All outputs on | 5 | |
| Off-state drain current | IDSX | 0.15 | 0.3 | μA | VDS = 30 V, TC = 125°C, VCC = 5 V | 5 | |
| Static drain-source on-state resistance | rDS(on) | 6 | 7.4 | 8.6 | Ω | ID = 20 mA, VCC = 5 V, TA = 25°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 6.7 | 8.9 | 9.6 | Ω | ID = 20 mA, VCC = 5 V, TA = 25°C, all channels ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 7.9 | 9.3 | 11.2 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 25°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 8.7 | 10.6 | 12.3 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 25°C, all channels ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 9.1 | 11.2 | 12.9 | Ω | ID = 20 mA, VCC = 5 V, TA = 125°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 10.3 | 13 | 14.5 | Ω | ID = 20 mA, VCC = 5 V, TA = 125°C, all channels ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 11.6 | 13.7 | 16.4 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 125°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 12.8 | 15.6 | 18.2 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 125°C, all channels ON | 5 |
| Thermal shutdown trip point | TSHUTDOWN | 150 | 175 | 200 | °C | 5 | |
| SRCK pulse duration, high | TSRCK_WH | 30 | ns | VCC = 5 V, TJ = 25°C | 6 | ||
| SRCK pulse duration, low | TSRCK_WL | 30 | ns | VCC = 5 V, TJ = 25°C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 81.2 | °C/W | DW (SOIC) package | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 45.4 | °C/W | DW (SOIC) package | 5 | ||
| Junction-to-board thermal resistance | RθJB | 49.1 | °C/W | DW (SOIC) package | 5 | ||
| Junction-to-top characterization parameter | ψJT | 17.5 | °C/W | DW (SOIC) package | 5 | ||
| Junction-to-board characterization parameter | ψJB | 48.6 | °C/W | DW (SOIC) package | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | bypass capacitors near the corresponding pin. Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat-flow | 15 |
CAD (KiCad official)
- Symbol:
TLC6C5912QDWRQ1 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
tlc6c5912qdwrq1-etched.step/tlc6c5912qdwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc6c5912qdwrq1.step/tlc6c5912qdwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
3ade8725cefdfc13, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLC6C5912QDWRQ1
**Texas Instruments** · LED Drivers · SOIC-20-300mil
TLC6C5912QDWRQ1 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin for the device, with a recommended supply range of 3 V to 5.5 V; TI recommends a 0.1 µF ceramic capacitor close to the pin. |
| 2 | SER IN | input | Serial-data input that loads into the internal shift register on each rising edge of SRCK. |
| 3 | DRAIN0 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 4 | DRAIN1 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 5 | DRAIN2 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 6 | DRAIN3 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 7 | DRAIN4 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 8 | DRAIN5 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 9 | CLR | input | Active-low shift register clear that clears all registers in the device when driven low; the storage register transfers data to the output buffer when CLR is high. |
| 10 | G | input | Active-low output enable: when low all drain channels are enabled according to the output-latch content, and when high all channels are off. |
| 11 | SER OUT | output | Serial-data output of the 12-bit shift register, shifted out on the falling edge of SRCK for cascading devices. |
| 12 | RCK | input | Storage register clock; data transfers from the shift register to the storage register on its rising edge. |
| 13 | DRAIN6 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 14 | DRAIN7 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 15 | DRAIN8 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 16 | DRAIN9 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 17 | DRAIN10 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 18 | DRAIN11 | output | Open-drain LED current-sink channel that can withstand up to 40 V LED supply voltage. |
| 19 | SRCK | input | Serial shift-register clock; data transfers from SER IN into the serial shift register on each rising edge. |
| 20 | GND | power_in | Power ground and reference pin for the device, which must connect to the PCB ground plane. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | LED Drivers |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic supply voltage | VCC | | | 8 | V | | 4 |
| Logic input voltage | VI | -0.3 | | 8 | V | | 4 |
| Power DMOS drain-to-source voltage | VDS | | | 42 | V | | 4 |
| Operating ambient temperature | Top | | | 125 | °C | | 4 |
| Operating junction temperature | TJ | -40 | | 150 | °C | | 4 |
| Storage temperature | Tstg | -55 | | 165 | °C | | 4 |
| Human body model ESD | V(ESD) | -2000 | | 2000 | V | HBM, per AEC Q100-002 | 4 |
| Charged device model ESD | V(ESD) | -750 | | 750 | V | CDM, per AEC Q100-011 | 4 |
| Supply voltage | VCC | 3 | | 5.5 | V | | 4 |
| High-level input voltage | VIH | 2.4 | | | V | | 4 |
| Low-level input voltage | VIL | | | 0.7 | V | | 4 |
| Setup time, SER IN high before SRCK↑ | tsu | 15 | | | ns | | 4 |
| Hold time, SER IN high after SRCK↑ | th | 15 | | | ns | | 4 |
| Pulse duration | tw | 40 | | | ns | | 4 |
| Operating case temperature | TC | -40 | | 125 | °C | | 4 |
| High-level output voltage, SER OUT | VOH | 4.9 | 4.99 | | V | IOH = -20 μA, VCC = 5 V | 5 |
| High-level output voltage, SER OUT | VOH | 4.5 | 4.69 | | V | IOH = -4 mA, VCC = 5 V | 5 |
| Low-level output voltage, SER OUT | VOL | | 0.001 | 0.01 | V | IOH = 20 μA, VCC = 5 V | 5 |
| Low-level output voltage, SER OUT | VOL | | 0.25 | 0.4 | V | IOH = 4 mA, VCC = 5 V | 5 |
| High-level input current | IIH | | | 0.2 | μA | VCC = 5 V, VI = VCC | 5 |
| Low-level input current | IIL | -0.2 | | | μA | VCC = 5 V, VI = 0 | 5 |
| Logic supply current, all outputs off | ICC | | 0.1 | 1 | μA | VCC = 5 V, No clock signal, All outputs off | 5 |
| Logic supply current, all outputs on | ICC | | 130 | 170 | μA | VCC = 5 V, No clock signal, All outputs on | 5 |
| Off-state drain current | IDSX | | 0.15 | 0.3 | μA | VDS = 30 V, TC = 125°C, VCC = 5 V | 5 |
| Static drain-source on-state resistance | rDS(on) | 6 | 7.4 | 8.6 | Ω | ID = 20 mA, VCC = 5 V, TA = 25°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 6.7 | 8.9 | 9.6 | Ω | ID = 20 mA, VCC = 5 V, TA = 25°C, all channels ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 7.9 | 9.3 | 11.2 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 25°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 8.7 | 10.6 | 12.3 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 25°C, all channels ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 9.1 | 11.2 | 12.9 | Ω | ID = 20 mA, VCC = 5 V, TA = 125°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 10.3 | 13 | 14.5 | Ω | ID = 20 mA, VCC = 5 V, TA = 125°C, all channels ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 11.6 | 13.7 | 16.4 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 125°C, single channel ON | 5 |
| Static drain-source on-state resistance | rDS(on) | 12.8 | 15.6 | 18.2 | Ω | ID = 20 mA, VCC = 3.3 V, TA = 125°C, all channels ON | 5 |
| Thermal shutdown trip point | TSHUTDOWN | 150 | 175 | 200 | °C | | 5 |
| SRCK pulse duration, high | TSRCK_WH | 30 | | | ns | VCC = 5 V, TJ = 25°C | 6 |
| SRCK pulse duration, low | TSRCK_WL | 30 | | | ns | VCC = 5 V, TJ = 25°C | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 81.2 | | °C/W | DW (SOIC) package | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 45.4 | | °C/W | DW (SOIC) package | 5 |
| Junction-to-board thermal resistance | RθJB | | 49.1 | | °C/W | DW (SOIC) package | 5 |
| Junction-to-top characterization parameter | ψJT | | 17.5 | | °C/W | DW (SOIC) package | 5 |
| Junction-to-board characterization parameter | ψJB | | 48.6 | | °C/W | DW (SOIC) package | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | bypass capacitors near the corresponding pin. Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat-flow | 15 |
## CAD (KiCad official)
- Symbol: `TLC6C5912QDWRQ1`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `tlc6c5912qdwrq1-etched.step` / `tlc6c5912qdwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc6c5912qdwrq1.step` / `tlc6c5912qdwrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlc6c5912-q1.pdf) (27 pp, sha256 `3ade8725cefdfc13`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlc6c5912qdwrq1-datasheet.pdf)