main
History Download
Ray Initial commit: component/tlc5929rger 047e548 18d ago

TLC5929RGER

Texas Instruments · LED Drivers · VQFN-24(4x4)

TLC5929RGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LAT input Data latch input: the rising edge of LAT latches the common shift register data into the output on/off data latch, and the shift register is then replaced with SID as selected by SIDLD.
2 OUT0 output Constant-current sink output 0; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
3 OUT1 output Constant-current sink output 1; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
4 OUT2 output Constant-current sink output 2; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
5 OUT3 output Constant-current sink output 3; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
6 OUT4 output Constant-current sink output 4; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
7 OUT5 output Constant-current sink output 5; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
8 OUT6 output Constant-current sink output 6; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
9 OUT7 output Constant-current sink output 7; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
10 OUT8 output Constant-current sink output 8; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
11 OUT9 output Constant-current sink output 9; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
12 OUT10 output Constant-current sink output 10; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
13 OUT11 output Constant-current sink output 11; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
14 OUT12 output Constant-current sink output 12; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
15 OUT13 output Constant-current sink output 13; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
16 OUT14 output Constant-current sink output 14; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
17 OUT15 output Constant-current sink output 15; outputs can be paralleled for more current and may have different voltages applied, with absolute maximum 11 V and 65 mA per output.
18 BLANK input Blank all outputs: when BLANK is high all constant-current outputs are forced off, and when low they are controlled by the on/off data latch.
19 SOUT output Serial data output of the 17-bit common shift register, connected to its MSB and clocked out on the SCLK rising edge.
20 IREF bidirectional Maximum-current programming terminal: a resistor from IREF to GND (1.32 kΩ to 66.0 kΩ) sets the maximum output current, and connecting IREF directly to GND forces all outputs off.
21 VCC power_in Power-supply voltage input; the features list gives an operating range of 3.0 V to 5.5 V.
22 GND power_in Ground terminal of the device.
23 SIN input Serial data input for the 17-bit common shift register; when SIN is high a '1' is written to the LSB on the SCLK rising edge.
24 SCLK input Serial data shift clock: data on SIN are shifted into the LSB of the 17-bit shift register on each SCLK rising edge, toward the MSB.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24(4x4)
Category LED Drivers
Pins 25

CAD (KiCad official)

  • Symbol: TLC5929RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: tlc5929rger-etched.step / tlc5929rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc5929rger.step / tlc5929rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (46 pp, sha256 46eb2307ba76accd, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF