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TLC59116FIRHBR

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Texas Instruments LED Drivers, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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TLC59116FIRHBR

Texas Instruments · LED Drivers · VQFN-32-EP(5x5)

TLC59116FIRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A2 input Hardware address input 2; inputs must be held at VCC or GND, with VIH of at least 0.7×VCC and VIL of at most 0.3×VCC.
2 A3 input Hardware address input 3; inputs must be held at VCC or GND, with VIH of at least 0.7×VCC and VIL of at most 0.3×VCC.
3 OUT0 output Open-drain LED output 0, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
4 OUT1 output Open-drain LED output 1, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
5 OUT2 output Open-drain LED output 2, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
6 OUT3 output Open-drain LED output 3, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
7 GND power_in Power ground.
8 OUT4 output Open-drain LED output 4, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
9 OUT5 output Open-drain LED output 5, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
10 OUT6 output Open-drain LED output 6, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
11 OUT7 output Open-drain LED output 7, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
12 N.C. unconnected No internal connection.
13 N.C. unconnected No internal connection.
14 OUT8 output Open-drain LED output 8, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
15 OUT9 output Open-drain LED output 9, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
16 OUT10 output Open-drain LED output 10, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
17 OUT11 output Open-drain LED output 11, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
18 GND power_in Power ground.
19 OUT12 output Open-drain LED output 12, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
20 OUT13 output Open-drain LED output 13, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
21 OUT14 output Open-drain LED output 14, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
22 OUT15 output Open-drain LED output 15, LED on at low; output voltage up to 17 V and up to 120 mA per channel.
23 GND power_in Power ground.
24 RESET input Active-low reset input; inputs must stay between 0 and 0.3×VCC for low and at least 0.7×VCC for high.
25 SCL input I2C serial clock input; logic levels VIH of at least 0.7×VCC and VIL of at most 0.3×VCC, with 5.5-V tolerant inputs.
26 SDA bidirectional I2C serial data input/output; low-level output current up to 20 mA at VCC = 3 V and 30 mA at VCC = 5 V.
27 VCC power_in Power supply, 3 V to 5.5 V.
28 N.C. unconnected No internal connection.
29 N.C. unconnected No internal connection.
30 N.C. unconnected No internal connection.
31 A0 input Hardware address input 0; inputs must be held at VCC or GND, with VIH of at least 0.7×VCC and VIL of at most 0.3×VCC.
32 A1 input Hardware address input 1; inputs must be held at VCC or GND, with VIH of at least 0.7×VCC and VIL of at most 0.3×VCC.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32-EP(5x5)
Category LED Drivers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input leakage current, SCL, SDA, A0-A3, RESET IL -0.3 0.3 µA VI = VCC or GND 5
Output leakage current OUT0-OUT15 0.5 µA VO = 17 V, TJ = 25°C 5
Low-level output current SDA (3 V) IOL 20 mA VCC = 3 V, VOL = 0.4 V 5
Low-level output current SDA (5 V) IOL 30 mA VCC = 5 V, VOL = 0.4 V 5
Low-level output voltage OUT0-OUT15 (3 V) VOL 200 450 mV VCC = 3 V, IOL = 120 mA 5
Low-level output voltage OUT0-OUT15 (4.5 V) VOL 175 400 mV VCC = 4.5 V, IOL = 120 mA 5
On resistance OUT0-OUT15 (3 V) rON 1.67 3.75 Ω VCC = 3 V, IOL = 120 mA 5
On resistance OUT0-OUT15 (4.5 V) rON 1.46 3.3 Ω VCC = 4.5 V, IOL = 120 mA 5
Overtemperature shutdown TSD 150 175 200 °C 5
Supply current, outputs OFF ICC 13 mA OUT0-OUT15 = OFF, VCC = 5.5 V 5
Power-on reset voltage VPOR 2.5 V 5
Restart hysteresis THYS 15 °C 5
Input capacitance SCL, A0-A3, RESET Ci 5 pF VI = VCC or GND 5
Input/output capacitance SDA Cio 8 pF VI = VCC or GND 5
Fast-mode plus SCL clock frequency fSCL 0 1000 kHz Fast-mode plus I2C bus 6
Bus free time between STOP and START tBUF 0.5 µs Fast-mode plus I2C bus 6
Hold time (repeated) START condition tHD;STA 0.26 µs Fast-mode plus I2C bus 6
Set-up time for (repeated) START condition tSU;STA 0.26 µs Fast-mode plus I2C bus 6
Set-up time for STOP condition tSU;STO 0.26 µs Fast-mode plus I2C bus 6
Data hold time tHD;DAT 0 ns Fast-mode plus I2C bus 6
Data valid acknowledge time tVD;ACK 0.05 0.45 µs Fast-mode plus I2C bus 6
Data valid time tVD;DAT 0.05 0.45 µs Fast-mode plus I2C bus 6
Data set-up time tSU;DAT 50 ns Fast-mode plus I2C bus 6
Low period of the SCL clock tLOW 0.5 µs Fast-mode plus I2C bus 6
High period of the SCL clock tHIGH 0.26 µs Fast-mode plus I2C bus 6
Fall time of SDA and SCL tf 120 ns Fast-mode plus I2C bus 6
Rise time of SDA and SCL tr 120 ns Fast-mode plus I2C bus 6
Pulse width of spikes suppressed by input filter tSP 50 ns 6
Reset pulse width tW 10 ns 6
Reset recovery time tREC 0 ns 6
Time to reset tRESET 400 ns 6
Supply voltage VCC 3 5.5 V 4
Low-level input voltage SCL, SDA, RESET, A0-A3 VIL 0 V 4
Output voltage OUT0-OUT15 VO 17 V 4
Low-level output current SDA (3 V) IOL 20 mA VCC = 3 V 4
Low-level output current SDA (5 V) IOL 30 mA VCC = 5 V 4
Output current per channel OUT0-OUT15 IO 120 mA 4
Operating free-air temperature TA -40 85 °C 4
Supply voltage VCC 0 7 V 4
Input voltage VI -0.4 7 V 4
Output voltage VO -0.5 20 V 4
Continuous output current per channel IO 120 mA 4
Junction temperature TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
Junction-to-ambient thermal resistance RθJA 34.4 °C/W RHB (VQFN, 32 pins) 4
Junction-to-case (top) thermal resistance RθJC(top) 26.3 °C/W RHB (VQFN, 32 pins) 4
Junction-to-board thermal resistance RθJB 8.3 °C/W RHB (VQFN, 32 pins) 4
Junction-to-top characterization parameter ψJT 0.4 °C/W RHB (VQFN, 32 pins) 4
Junction-to-board characterization parameter ψJB 8.2 °C/W RHB (VQFN, 32 pins) 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 3.3 °C/W RHB (VQFN, 32 pins) 4

CAD (KiCad official)

  • Symbol: TLC59116FIRHBR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tlc59116firhbr-etched.step / tlc59116firhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc59116firhbr.step / tlc59116firhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 b871ef3128c77c9a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF