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Ray Publish 0.1.0 88d5fd5 1d ago
{
  "slug": "tlc5620idr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Digital To Analog Converters (DAC), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "tlc5620idr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tlc5620idr.kicad_sym",
    "tlc5620idr.kicad_mod",
    "tlc5620idr.glb",
    "tlc5620idr.step",
    "tlc5620idr.lbr",
    "docs/hero.png",
    "docs/tlc5620idr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tlc5620idr-hero.glb",
    "tlc5620idr-hero.overlay.json"
  ],
  "component": {
    "mpn": "TLC5620IDR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tlc5620.pdf",
    "parts": {
      "symbol": "tlc5620idr.kicad_sym",
      "footprint": "tlc5620idr.kicad_mod",
      "model_3d": "tlc5620idr-hero.glb",
      "model_3d_plain": "tlc5620idr.glb",
      "model_3d_step": "tlc5620idr-etched.step",
      "model_3d_step_plain": "tlc5620idr.step",
      "lbr": "tlc5620idr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2679464",
      "digikey": "296-1339-2-ND",
      "mouser": "595-TLC5620IDR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T20:54:42Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-1339-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-TLC5620IDR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GND",
        "type": "power_in",
        "description": "Ground return and reference terminal for the device; the resistor strings of all four DACs are tied to this terminal."
      },
      {
        "number": "2",
        "name": "REFA",
        "type": "input",
        "description": "Reference voltage input to DAC A that defines its output analog range; the input is buffered and high impedance, and Vref is specified as VDD-1.5 V maximum."
      },
      {
        "number": "3",
        "name": "REFB",
        "type": "input",
        "description": "Reference voltage input to DAC B that defines its output analog range; the input is buffered and high impedance, and Vref is specified as VDD-1.5 V maximum."
      },
      {
        "number": "4",
        "name": "REFC",
        "type": "input",
        "description": "Reference voltage input to DAC C that defines its output analog range; the input is buffered and high impedance, and Vref is specified as VDD-1.5 V maximum."
      },
      {
        "number": "5",
        "name": "REFD",
        "type": "input",
        "description": "Reference voltage input to DAC D that defines its output analog range; the input is buffered and high impedance, and Vref is specified as VDD-1.5 V maximum."
      },
      {
        "number": "6",
        "name": "DATA",
        "type": "input",
        "description": "Serial interface digital data input; the DAC code is clocked into the serial register MSB first, with each bit captured on the falling edge of CLK."
      },
      {
        "number": "7",
        "name": "CLK",
        "type": "input",
        "description": "Serial interface clock; input data is shifted into the serial interface register on the falling edge of CLK, with a maximum frequency of 1 MHz."
      },
      {
        "number": "8",
        "name": "LOAD",
        "type": "input",
        "description": "Serial interface load control; when LDAC is low, the falling edge of LOAD latches the data into the output latch and immediately produces the analog voltage at the DAC output, with a minimum LOAD pulse width of 250 ns."
      },
      {
        "number": "9",
        "name": "DACD",
        "type": "output",
        "description": "DAC D analog output, buffered with a configurable x1 or x2 gain output range."
      },
      {
        "number": "10",
        "name": "DACC",
        "type": "output",
        "description": "DAC C analog output, buffered with a configurable x1 or x2 gain output range."
      },
      {
        "number": "11",
        "name": "DACB",
        "type": "output",
        "description": "DAC B analog output, buffered with a configurable x1 or x2 gain output range."
      },
      {
        "number": "12",
        "name": "DACA",
        "type": "output",
        "description": "DAC A analog output, buffered with a configurable x1 or x2 gain output range."
      },
      {
        "number": "13",
        "name": "LDAC",
        "type": "input",
        "description": "Load DAC control; when high, no DAC output updates occur as input data is read into the serial register, and the DAC outputs update only on a high-to-low LDAC transition."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage, specified at 4.75 V to 5.25 V (5 V ±5%) in the recommended operating conditions."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 18,
        "cost_usd": 0.0824,
        "at": "2026-10-08T20:54:21"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tlc5620.pdf",
        "pages": 18,
        "sha256": "9ce88ae341deb373",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tlc5620idr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tlc5620idr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ccc8f63a186fb928fbcc62212602420787db90febbf2d51c66eba1730e615191",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}