component
TLC5620CDR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLC5620CDR
Texas Instruments · Digital To Analog Converters (DAC) · SOIC-14
TLC5620CDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground return and reference terminal for the device. |
| 2 | REFA | input | Reference voltage input to DAC A; this voltage defines the output analog range with input voltage range -0.3V to VDD+0.3V. |
| 3 | REFB | input | Reference voltage input to DAC B; this voltage defines the output analog range with input voltage range -0.3V to VDD+0.3V. |
| 4 | REFC | input | Reference voltage input to DAC C; this voltage defines the output analog range with input voltage range -0.3V to VDD+0.3V. |
| 5 | REFD | input | Reference voltage input to DAC D; this voltage defines the output analog range with input voltage range -0.3V to VDD+0.3V. |
| 6 | DATA | input | Serial interface digital data input; each data bit is clocked into the register on the falling edge of the clock signal with digital input voltage range -0.3V to VDD+0.3V. |
| 7 | CLK | input | Serial interface clock input; digital data is shifted into the serial interface register on the falling edge of clock with maximum frequency 1 MHz and digital input voltage range -0.3V to VDD+0.3V. |
| 8 | LOAD | input | Serial interface load control input; when LDAC is low, the falling edge of LOAD latches digital data into the output latch with minimum pulse duration 250 ns. |
| 9 | DACD | output | DAC D analog output voltage that ranges between GND and either one or two times the reference voltage depending on range bit selection. |
| 10 | DACC | output | DAC C analog output voltage that ranges between GND and either one or two times the reference voltage depending on range bit selection. |
| 11 | DACB | output | DAC B analog output voltage that ranges between GND and either one or two times the reference voltage depending on range bit selection. |
| 12 | DACA | output | DAC A analog output voltage that ranges between GND and either one or two times the reference voltage depending on range bit selection. |
| 13 | LDAC | input | Load DAC input control; when high, no DAC output updates occur during serial programming; outputs only update when LDAC transitions from high to low with minimum pulse duration 250 ns. |
| 14 | VDD | power_in | Positive supply voltage input; recommended operating range 4.75V to 5.25V for 5V single-supply operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Data Acquisition |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
TLC5620CDR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
tlc5620cdr-etched.step/tlc5620cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc5620cdr.step/tlc5620cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
9ce88ae341deb373, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).