component
TLC555DRG
Public Made by Adomby adom
HANSCHIP semiconductor Timers / Counters, SOP-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# TLC555DRG++**HANSCHIP semiconductor** · Timers / Counters · SOP-8++TLC555DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Ground reference (0 V); all voltages referenced to this pin. |+| 2 | TRIGGER | input | Active-low trigger input; sets output high when voltage falls below 1/3 VCC (typ. 0.31-0.36 × VCC at 25°C, VCC = 5 V); input current is low per CMOS design. |+| 3 | OUTPUT | output | Timer output; VOL ≤ 1.0 V at IOL = 20 mA (VCC = 15 V), VOH ≥ 4.0 V at IOH = −0.8 mA (VCC = 5 V); rise/fall time 35-75 ns typical at 25°C. |+| 4 | RESET | input | Active-low reset input; forces output low and turns discharge transistor on when pulled below 0.4-1.0 V (VCC = 2 V, 25°C); overrides TRIGGER and THRESHOLD. |+| 5 | CONTROL_VOLTAGE | input | Control voltage input; sets internal threshold to 0.65-0.69 × VCC (25°C); bypass to GND with 0.01 µF when unused for stable operation. |+| 6 | THRESHOLD | input | Threshold comparator input; resets flip-flop and drives output low when voltage exceeds 2/3 VCC (0.60-0.80 × VCC operating range). |+| 7 | DISCHARGE | output | Open-drain discharge output; internal transistor turns on (output low) to discharge external timing capacitor when output is low; turns off when output is high. |+| 8 | VCC | power_in | Positive supply voltage, 2.0 V to 18.0 V recommended; supply current ICC ≤ 300 µA at VCC = 18 V (25°C). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HANSCHIP semiconductor |+| Package | SOP-8 |+| Category | Clock/Timing |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TLC555DRG`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)+- 3D model files: `tlc555drg-etched.step` / `tlc555drg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc555drg.step` / `tlc555drg.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HANSCHIP semiconductor datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757786776277147648) (9 pp, sha256 `59ff8742b6bde993`, retrieved 2026-09-29, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlc555drg-datasheet.pdf)
page.jsonadded+140@@ -0,0 +1,140 @@+{+ "slug": "tlc555drg",+ "version": "0.1.0",+ "type": "component",+ "description": "HANSCHIP semiconductor Timers / Counters, SOP-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "clock-timing",+ "tlc555drg",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tlc555drg.kicad_sym",+ "tlc555drg.kicad_mod",+ "tlc555drg.glb",+ "tlc555drg.step",+ "tlc555drg.lbr",+ "docs/hero.png",+ "docs/tlc555drg-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "TLC555DRG",+ "manufacturer": "HANSCHIP semiconductor",+ "package": "SOP-8",+ "pin_count": 8,+ "category": "Clock/Timing",+ "subcategory": "Timers / Counters",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757786776277147648",+ "parts": {+ "symbol": "tlc555drg.kicad_sym",+ "footprint": "tlc555drg.kicad_mod",+ "model_3d": "tlc555drg-etched.glb",+ "model_3d_plain": "tlc555drg.glb",+ "model_3d_step": "tlc555drg-etched.step",+ "model_3d_step_plain": "tlc555drg.step",+ "lbr": "tlc555drg.lbr"+ },+ "distributor_links": {+ "lcsc": "C5145349"+ },+ "distributor_check": {+ "checked_at": "2026-09-29T16:59:00Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V); all voltages referenced to this pin."+ },+ {+ "number": "2",+ "name": "TRIGGER",+ "type": "input",+ "description": "Active-low trigger input; sets output high when voltage falls below 1/3 VCC (typ. 0.31-0.36 × VCC at 25°C, VCC = 5 V); input current is low per CMOS design."+ },+ {+ "number": "3",+ "name": "OUTPUT",+ "type": "output",+ "description": "Timer output; VOL ≤ 1.0 V at IOL = 20 mA (VCC = 15 V), VOH ≥ 4.0 V at IOH = −0.8 mA (VCC = 5 V); rise/fall time 35-75 ns typical at 25°C."+ },+ {+ "number": "4",+ "name": "RESET",+ "type": "input",+ "description": "Active-low reset input; forces output low and turns discharge transistor on when pulled below 0.4-1.0 V (VCC = 2 V, 25°C); overrides TRIGGER and THRESHOLD."+ },+ {+ "number": "5",+ "name": "CONTROL_VOLTAGE",+ "type": "input",+ "description": "Control voltage input; sets internal threshold to 0.65-0.69 × VCC (25°C); bypass to GND with 0.01 µF when unused for stable operation."+ },+ {+ "number": "6",+ "name": "THRESHOLD",+ "type": "input",+ "description": "Threshold comparator input; resets flip-flop and drives output low when voltage exceeds 2/3 VCC (0.60-0.80 × VCC operating range)."+ },+ {+ "number": "7",+ "name": "DISCHARGE",+ "type": "output",+ "description": "Open-drain discharge output; internal transistor turns on (output low) to discharge external timing capacitor when output is low; turns off when output is high."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage, 2.0 V to 18.0 V recommended; supply current ICC ≤ 300 µA at VCC = 18 V (25°C)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757786776277147648",+ "pages": 9,+ "sha256": "59ff8742b6bde993",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}