component
TLC555DRG
Public Made by Adomby adom
HANSCHIP semiconductor Timers / Counters, SOP-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownTLC555DRG
HANSCHIP semiconductor · Timers / Counters · SOP-8
TLC555DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference (0 V); all voltages referenced to this pin. |
| 2 | TRIGGER | input | Active-low trigger input; sets output high when voltage falls below 1/3 VCC (typ. 0.31-0.36 × VCC at 25°C, VCC = 5 V); input current is low per CMOS design. |
| 3 | OUTPUT | output | Timer output; VOL ≤ 1.0 V at IOL = 20 mA (VCC = 15 V), VOH ≥ 4.0 V at IOH = −0.8 mA (VCC = 5 V); rise/fall time 35-75 ns typical at 25°C. |
| 4 | RESET | input | Active-low reset input; forces output low and turns discharge transistor on when pulled below 0.4-1.0 V (VCC = 2 V, 25°C); overrides TRIGGER and THRESHOLD. |
| 5 | CONTROL_VOLTAGE | input | Control voltage input; sets internal threshold to 0.65-0.69 × VCC (25°C); bypass to GND with 0.01 µF when unused for stable operation. |
| 6 | THRESHOLD | input | Threshold comparator input; resets flip-flop and drives output low when voltage exceeds 2/3 VCC (0.60-0.80 × VCC operating range). |
| 7 | DISCHARGE | output | Open-drain discharge output; internal transistor turns on (output low) to discharge external timing capacitor when output is low; turns off when output is high. |
| 8 | VCC | power_in | Positive supply voltage, 2.0 V to 18.0 V recommended; supply current ICC ≤ 300 µA at VCC = 18 V (25°C). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TLC555DRG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tlc555drg-etched.step/tlc555drg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc555drg.step/tlc555drg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (9 pp, sha256
59ff8742b6bde993, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).