# TLC555CDR

**Texas Instruments** · Timers / Counters · SOIC-8

TLC555CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference (0 V) for the device. |
| 2 | TRIG | input | Trigger input. When TRIG falls below 1/3 VDD, the internal flip-flop is set and OUT goes high; also starts the timing interval in monostable mode. |
| 3 | OUT | output | Push-pull CMOS output. Sources/sinks up to ~100 mA depending on VDD; swings between GND and near VDD. |
| 4 | RESET | input | Active-low reset. Pulling RESET below ~0.4 V forces OUT low and discharges the timing capacitor regardless of other inputs. Tie to VDD if unused. |
| 5 | CONT | input | Control voltage. Provides access to the internal 2/3 VDD reference of the upper comparator; can be driven externally to modulate timing or bypassed to GND with 10 nF for noise immunity. |
| 6 | THRES | input | Threshold input. When THRES rises above 2/3 VDD (or the voltage on CONT), the internal flip-flop is reset and OUT goes low. |
| 7 | DISCH | output | Discharge. Open-drain N-channel transistor to GND used to discharge the external timing capacitor when OUT is low. |
| 8 | VDD | power_in | Positive supply, 2 V to 15 V (18 V absolute max). Bypass to GND with a 100 nF ceramic near the device. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Clock/Timing |
| Pins | 8 |

## Ordering variants

Same part, different packaging or reel option.

- `TLC555CDR`
- `TLC555CDRIDR`
- `TLC555CDRID`
- `TLC555CDRCP`
- `TLC555CDRIP`
- `TLC555CDRCDGKR`
- `TLC555CDRIDGKR`
- `TLC555CDRCPWR`
- `TLC555CDRIPWR`

## CAD (KiCad official)

- Symbol: `TLC555CDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tlc555cdr-etched.step` / `tlc555cdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc555cdr.step` / `tlc555cdr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc555) (49 pp, sha256 `2141b3917cf4918a`, retrieved 2026-08-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlc555cdr-datasheet.pdf)