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TLC4502AIDR

Texas Instruments · Precision OpAmps · SOIC-8

TLC4502AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Channel 1 amplifier output, rail-to-rail swing, with absolute maximum output current of ±100 mA per output and short-circuit current limited to about 60 mA to 70 mA.
2 1IN- input Channel 1 inverting input; input voltage range is VDD- to VDD+ - 2.3 V, and inputs must not go more than -0.3 V below VDD- at 25°C.
3 1IN+ input Channel 1 non-inverting input; common-mode input range is VDD- to VDD+ - 2.3 V, which includes ground.
4 VDD-/GND power_in Negative supply rail (ground reference for all voltages); total current out of VDD-/GND is limited to ±100 mA.
5 2IN+ input Channel 2 non-inverting input; common-mode input range is VDD- to VDD+ - 2.3 V, which includes ground.
6 2IN- input Channel 2 inverting input; input voltage range is VDD- to VDD+ - 2.3 V, and inputs must not go more than -0.3 V below VDD- at 25°C.
7 2OUT output Channel 2 amplifier output, rail-to-rail swing, with absolute maximum output current of ±100 mA per output and short-circuit current limited to about 60 mA to 70 mA.
8 VDD+ power_in Positive supply rail; recommended supply voltage is 4 V to 6 V, absolute maximum is 7 V, and total current into VDD+ is limited to ±100 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (TLC4502A) VIO -50 10 50 µV VDD = ±2.5 V, VO = 0, VIC = 0, RS = 50 Ω 6
Input offset current, 25°C IIO 1 60 pA VDD = ±2.5 V, VO = 0, VIC = 0, RS = 50 Ω, 25°C 6
Input offset current, -40°C to 85°C IIO 500 pA VDD = ±2.5 V, VO = 0, VIC = 0, RS = 50 Ω, -40°C to 85°C 6
Input offset current, full range IIO 5 nA VDD = ±2.5 V, VO = 0, VIC = 0, RS = 50 Ω, full range -40°C to 125°C 6
Input bias current, 25°C IIB 1 60 pA VDD = ±2.5 V, VO = 0, VIC = 0, RS = 50 Ω, 25°C 6
Input bias current, -40°C to 85°C IIB 500 pA VDD = ±2.5 V, VO = 0, VIC = 0, RS = 50 Ω, -40°C to 85°C 6
Input bias current, full range IIB 10 nA VDD = ±2.5 V, VO = 0, VIC = 0, RS = 50 Ω, full range -40°C to 125°C 6
High-level output voltage, 25°C VOH 4.99 V IOH = -500 µA, 25°C 6
High-level output voltage, 25°C VOH 4.9 V IOH = 5 mA, 25°C 6
High-level output voltage, full range VOH 4.7 V IOH = -5 mA, full range 6
Low-level output voltage, 25°C VOL 0.01 V VIC = 2.5 V, IOL = 500 µA, 25°C 6
Low-level output voltage, 25°C VOL 0.1 V VIC = 2.5 V, IOL = 5 mA, 25°C 6
Low-level output voltage, full range VOL 0.3 V VIC = 2.5 V, IOL = 5 mA, full range 6
Large-signal differential voltage amplification, 25°C AVD 200 1000 V/mV VIC = 2.5 V, VO = 1 V to 4 V, RL = 1 kΩ, 25°C 6
Large-signal differential voltage amplification, full range AVD 200 V/mV VIC = 2.5 V, VO = 1 V to 4 V, RL = 1 kΩ, full range 6
Common-mode rejection ratio, 25°C CMRR 90 100 dB VIC = 0 to 2.7 V, VO = 2.5 V, RS = 1 kΩ, 25°C 6
Common-mode rejection ratio, full range CMRR 85 dB VIC = 0 to 2.7 V, VO = 2.5 V, RS = 1 kΩ, full range 6
Supply-voltage rejection ratio, 25°C kSVR 90 100 dB VDD = 4 V to 6 V, VIC = 0, no load, 25°C 6
Supply-voltage rejection ratio, full range kSVR 90 dB VDD = 4 V to 6 V, VIC = 0, no load, full range 6
Supply current, 25°C IDD 2.5 3.5 mA VO = 2.5 V, no load, 25°C 6
Supply current, full range IDD 4 mA VO = 2.5 V, no load, full range 6
Slew rate at unity gain, 25°C SR 1.5 2.5 V/µs VO = 0.5 V to 2.5 V, CL = 100 pF, 25°C 7
Slew rate at unity gain, full range SR 1 V/µs VO = 0.5 V to 2.5 V, CL = 100 pF, full range 7
Supply voltage, absolute maximum VDD+ 7 V 3
Differential input voltage VID -7 7 V 3
Input voltage range (any input) VI -0.3 7 V 3
Input current (each input) II -5 5 mA 3
Output current (each output) IO -100 100 mA 3
Total current into VDD+ -100 100 mA 3
Total current out of VDD-/GND -100 100 mA 3
Electrostatic discharge (ESD) 2 kV 3
Storage temperature range Tstg -65 150 °C 3
Lead temperature 1,6 mm (1/16 inch) from case 260 °C for 10 seconds 3
Supply voltage VDD 4 6 V TLC4502I 3
Operating free-air temperature TA -40 125 °C TLC4502I 3
Continuous total power dissipation, package D 725 mW TA ≤ 25°C, package D 3
Power rating, package D 464 mW TA = 70°C, package D 3
Power rating, package D 377 mW TA = 85°C, package D 3
Power rating, package D 145 mW TA = 125°C, package D 3
Derating factor above TA = 25°C, package D 5.8 mW/°C package D 3

CAD (KiCad official)

  • Symbol: TLC4502AIDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlc4502aidr-etched.step / tlc4502aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc4502aidr.step / tlc4502aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 4b4b5b81cf89ac76, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF