Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TLC3548IPW

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-24

TLC3548IPW from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Serial clock input from the host that clocks SDI in and SDO out, and is disabled for data transfer when CS is high, though it can still serve as the conversion clock when the external clock is selected.
2 FS input Frame sync input from the DSP whose rising edge marks the start of a serial frame, and it must be tied to DVDD when not used.
3 SDI input Serial data input whose first four MSBs are decoded as a command, and it must be tied to DVDD for hardware default mode.
4 EOC/INT output Multifunction output that goes low at the start of conversion as EOC in mode 00 only, or falls as INT to indicate data is ready for output.
5 SDO tri_state The 3-state serial output that shifts out the conversion result MSB first and is in high-impedance state when CS is high.
6 DGND power_in Digital ground return for the internal digital circuitry.
7 DVDD power_in Digital supply voltage, supporting the 3 V to 5 V digital supply range.
8 CS input Chip select where a high level puts SDO in high-impedance and ignores SDI, and a falling edge resets the 4-bit counter and starts the operation cycle.
9 A0 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
10 A1 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
11 A2 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
12 A3 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
13 A4 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
14 A5 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
15 A6 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
16 A7 input Analog signal input multiplexed internally, with source impedance of 1 kΩ or less recommended for normal sampling.
17 AVDD power_in Analog supply voltage, operating from a single 5 V analog supply.
18 AGND power_in Analog ground return for the internal circuitry, to which all analog voltage measurements are referenced.
19 REFP input External positive reference input that may be 3 V to 5 V and needs 10 µF in parallel with 0.1 µF decoupling to REFM when used.
20 REFM input External low reference input that must be connected to AGND.
21 BGAP input Internal bandgap compensation pin with capacitors to AGND of 0.1 µF for an external reference or 10 µF in parallel with 0.1 µF for the internal reference.
22 AGND power_in Analog ground return for the internal circuitry, to which all analog voltage measurements are referenced.
23 AVDD power_in Analog supply voltage, operating from a single 5 V analog supply.
24 CSTART input External sampling trigger whose low time sets the sampling period in extended mode, with the first CSTART not permitted before the rising edge of the 11th SCLK, and tied to DVDD if unused.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Data Acquisition
Pins 24

CAD (KiCad official)

  • Symbol: TLC3548IPW
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: tlc3548ipw-etched.step / tlc3548ipw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc3548ipw.step / tlc3548ipw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 8b7afcf5259b323c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF