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TLC271CP

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Texas Instruments Operational Amplifier, PDIP-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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TLC271CP

Texas Instruments · Operational Amplifier · PDIP-8

TLC271CP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OFFSET N1 passive Offset null terminal N1, used with OFFSET N2 to null the input offset voltage; the excerpt gives no further limits for this pin.
2 IN - input Inverting input; the common-mode input voltage range extends below the negative rail for C-suffix and I-suffix types.
3 IN + input Noninverting input; the common-mode input voltage range extends below the negative rail for C-suffix and I-suffix types.
4 GND power_in Negative supply rail (ground) for single-supply operation; the output voltage range includes this negative rail.
5 BIAS SELECT input Selects high, medium, or low bias mode to trade power dissipation against ac performance (typical PD 3.4, 0.5, and 0.05 mW at VDD = 5 V, TA = 25°C).
6 VDD power_in Positive supply; the C-suffix (0°C to 70°C) devices operate from 3 V to 16 V supply.
7 OUT output Amplifier output; the output voltage range includes the negative rail.
8 OFFSET N2 passive Offset null terminal N2, used with OFFSET N1 to null the input offset voltage; the excerpt gives no further limits for this pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 3 16 V C suffix (TLC271C) 5
Common-mode input voltage VIC -0.2 3.5 V VDD = 5 V, C suffix 5
Common-mode input voltage VIC -0.2 8.5 V VDD = 10 V, C suffix 5
Operating free-air temperature TA 0 70 °C C suffix 5
Supply voltage VDD 18 V See Note 1 5
Input current II -5 5 mA 5
Output current IO -30 30 mA 5
Storage temperature range Tstg -65 150 °C 5
Lead temperature 260 °C 1,6 mm from case for 10 s, D or P package 5
Power rating, P package 1000 mW TA ≤ 25°C 5
Derating factor above TA = 25°C, P package 8 mW/°C Above TA = 25°C, P package 5
Power rating, P package 640 mW TA = 70°C, P package 5
Input offset voltage VIO 1.1 10 mV High-bias, 25°C, VDD = 5 V, VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 10 kΩ 6
Input offset voltage (full range) VIO 12 mV High-bias, full range 0°C to 70°C, VDD = 5 V, VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 10 kΩ 6
Average temperature coefficient of input offset voltage αVIO 1.8 2 µV/°C High-bias, 25°C to 70°C 6
Common-mode input voltage range (positive/negative limits) VICR -0.2 3.5 V High-bias, full range, VDD = 5 V, see Note 5 6
Common-mode input voltage range (positive/negative limits) VICR -0.2 8.5 V High-bias, full range, VDD = 10 V, see Note 5 6
Input bias current IIB 0.6 60 pA High-bias, 25°C, VDD = 5 V, VO = VDD/2, VIC = VDD/2 6
Input bias current IIB 0.7 60 pA High-bias, 25°C, VDD = 10 V, VO = VDD/2, VIC = VDD/2 6
High-level output voltage VOH 3.2 3.8 V High-bias, 25°C, VDD = 5 V, VID = 100 mV, RL = 10 kΩ 6
High-level output voltage VOH 8 8.5 V High-bias, 25°C, VDD = 10 V, VID = 100 mV, RL = 10 kΩ 6
Low-level output voltage VOL 0 50 mV High-bias, 25°C, VDD = 5 V, VID = -100 mV, IOL = 0 6
Large-signal differential voltage amplification AVD 5 23 V/mV High-bias, 25°C, VDD = 5 V, RL = 10 kΩ, see Note 6 6
Large-signal differential voltage amplification AVD 10 36 V/mV High-bias, 25°C, VDD = 10 V, RL = 10 kΩ, see Note 6 6
Common-mode rejection ratio CMRR 65 80 dB High-bias, 25°C, VIC = VICRmin, VDD = 5 V 6
Common-mode rejection ratio CMRR 65 85 dB High-bias, 25°C, VIC = VICRmin, VDD = 10 V 6
Supply current IDD 675 1600 µA High-bias, 25°C, VDD = 5 V, VO = VDD/2, VIC = VDD/2, no load 6
Supply current IDD 950 2000 µA High-bias, 25°C, VDD = 10 V, VO = VDD/2, VIC = VDD/2, no load 6
Input offset voltage VIO 1.1 10 mV Medium-bias, 25°C, VDD = 5 V, VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 100 kΩ 22
Input offset voltage (full range) VIO 12 mV Medium-bias, full range 0°C to 70°C, VDD = 5 V, VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 100 kΩ 22
Average temperature coefficient of input offset voltage αVIO 1.7 2.1 µV/°C Medium-bias, 25°C to 70°C 22
High-level output voltage VOH 3.2 3.9 V Medium-bias, 25°C, VDD = 5 V, VID = 100 mV, RL = 100 kΩ 22
High-level output voltage VOH 8 8.7 V Medium-bias, 25°C, VDD = 10 V, VID = 100 mV, RL = 100 kΩ 22
Low-level output voltage VOL 0 50 mV Medium-bias, 25°C, VDD = 5 V, VID = -100 mV, IOL = 0 22
Large-signal differential voltage amplification AVD 25 170 V/mV Medium-bias, 25°C, VDD = 5 V, RL = 100 kΩ, see Note 6 22
Large-signal differential voltage amplification AVD 25 275 V/mV Medium-bias, 25°C, VDD = 10 V, RL = 100 kΩ, see Note 6 22
Common-mode rejection ratio CMRR 65 91 dB Medium-bias, 25°C, VIC = VICRmin, VDD = 5 V 22
Common-mode rejection ratio CMRR 65 94 dB Medium-bias, 25°C, VIC = VICRmin, VDD = 10 V 22
Supply current IDD 105 280 µA Medium-bias, 25°C, VDD = 5 V, VO = VDD/2, VIC = VDD/2, no load 22
Supply current IDD 143 300 µA Medium-bias, 25°C, VDD = 10 V, VO = VDD/2, VIC = VDD/2, no load 22
Input offset voltage VIO 1.1 10 mV Low-bias, 25°C, VDD = 5 V, VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 1 MΩ 38
Input offset voltage (full range) VIO 12 mV Low-bias, full range 0°C to 70°C, VDD = 5 V, VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 1 MΩ 38
Average temperature coefficient of input offset voltage αVIO 1.1 1 µV/°C Low-bias, 25°C to 70°C, as printed 38
High-level output voltage VOH 3.2 4.1 V Low-bias, 25°C, VDD = 5 V, VID = 100 mV, RL = 1 MΩ 38
High-level output voltage VOH 8 8.9 V Low-bias, 25°C, VDD = 10 V, VID = 100 mV, RL = 1 MΩ 38
Low-level output voltage VOL 0 50 mV Low-bias, 25°C, VDD = 5 V, VID = -100 mV, IOL = 0 38
Large-signal differential voltage amplification AVD 50 520 V/mV Low-bias, 25°C, VDD = 5 V, RL = 1 MΩ, see Note 6 38
Large-signal differential voltage amplification AVD 50 870 V/mV Low-bias, 25°C, VDD = 10 V, RL = 1 MΩ, see Note 6 38
Common-mode rejection ratio CMRR 65 94 dB Low-bias, 25°C, VIC = VICRmin, VDD = 5 V 38
Common-mode rejection ratio CMRR 65 97 dB Low-bias, 25°C, VIC = VICRmin, VDD = 10 V 38
Supply current IDD 10 17 µA Low-bias, 25°C, VDD = 5 V, VO = VDD/2, VIC = VDD/2, no load 38
Supply current IDD 14 23 µA Low-bias, 25°C, VDD = 10 V, VO = VDD/2, VIC = VDD/2, no load 38

CAD (KiCad official)

  • Symbol: TLC271CP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: tlc271cp-etched.step / tlc271cp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc271cp.step / tlc271cp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (86 pp, sha256 462161034a481a4b, retrieved 2026-10-22, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF