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TLC271BIDR

Public Made by Adom

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Texas Instruments Operational Amplifier, SOIC-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TLC271BIDR

Texas Instruments · Operational Amplifier · SOIC-8

TLC271BIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OFFSET N1 input Offset null adjustment input for input offset voltage trimming.
2 IN, input Inverting input with high input impedance (1012 Ω typical) and common-mode input voltage range extending below the negative rail.
3 IN + input Non-inverting input with high input impedance (1012 Ω typical) and common-mode input voltage range extending below the negative rail.
4 GND power_in Ground reference.
5 BIAS SELECT input Bias mode selection input for programming between high-bias, medium-bias, or low-bias modes to optimize power dissipation and AC performance.
6 VDD power_in Positive supply voltage input; operating range 4 V to 16 V for the -40°C to 85°C temperature range.
7 OUT output Output with voltage range including the negative rail.
8 OFFSET N2 input Offset null adjustment input for input offset voltage trimming.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (TLC271BI, VDD = 5 V) VIO 0.34 2 mV VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 10 kΩ, 25°C 7
Input offset voltage (TLC271BI, VDD = 10 V) VIO 0.39 2 mV VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 10 kΩ, 25°C 7
Input offset voltage full range (TLC271BI, VDD = 5 V) VIO 3.5 mV VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 10 kΩ, full range (-40°C to 85°C) 7
Input offset voltage full range (TLC271BI, VDD = 10 V) VIO 3.5 mV VO = 1.4 V, VIC = 0 V, RS = 50 Ω, RL = 10 kΩ, full range (-40°C to 85°C) 7
Input offset current (VDD = 5 V, 25°C) IIO 0.1 60 pA VO = VDD/2, VIC = VDD/2, 25°C 7
Input offset current (VDD = 10 V, 25°C) IIO 0.1 60 pA VO = VDD/2, VIC = VDD/2, 25°C 7
Input bias current (VDD = 5 V, 25°C) IIB 0.6 60 pA VO = VDD/2, VIC = VDD/2, 25°C 7
Input bias current (VDD = 10 V, 25°C) IIB 0.7 60 pA VO = VDD/2, VIC = VDD/2, 25°C 7
Input offset current (VDD = 5 V, 85°C) IIO 24 1000 pA VO = VDD/2, VIC = VDD/2, 85°C 7
Input offset current (VDD = 10 V, 85°C) IIO 26 1000 pA VO = VDD/2, VIC = VDD/2, 85°C 7
Input bias current (VDD = 5 V, 85°C) IIB 200 2000 pA VO = VDD/2, VIC = VDD/2, 85°C 7
Input bias current (VDD = 10 V, 85°C) IIB 220 2000 pA VO = VDD/2, VIC = VDD/2, 85°C 7
Common-mode input voltage range (VDD = 5 V) VICR -0.2 3.5 V Full range (see Note 5) 7
Common-mode input voltage range (VDD = 10 V) VICR -0.2 8.5 V Full range (see Note 5) 7
High-level output voltage (VDD = 5 V, 25°C) VOH 3.2 3.8 V VID = 100 mV, RL = 10 kΩ, 25°C 7
High-level output voltage (VDD = 10 V, 25°C) VOH 8 8.5 V VID = 100 mV, RL = 10 kΩ, 25°C 7
High-level output voltage (VDD = 5 V, -40°C) VOH 3 3.8 V VID = 100 mV, RL = 10 kΩ, -40°C 7
High-level output voltage (VDD = 10 V, -40°C) VOH 7.8 8.5 V VID = 100 mV, RL = 10 kΩ, -40°C 7
High-level output voltage (VDD = 5 V, 85°C) VOH 3 3.8 V VID = 100 mV, RL = 10 kΩ, 85°C 7
High-level output voltage (VDD = 10 V, 85°C) VOH 7.8 8.5 V VID = 100 mV, RL = 10 kΩ, 85°C 7
Low-level output voltage (25°C) VOL 0 50 mV VID = -100 mV, IOL = 0, 25°C 7
Low-level output voltage (-40°C) VOL 0 50 mV VID = -100 mV, IOL = 0, -40°C 7
Low-level output voltage (85°C) VOL 0 50 mV VID = -100 mV, IOL = 0, 85°C 7
Large-signal differential voltage amplification (VDD = 5 V, 25°C) AVD 5 23 V/mV RL = 10 kΩ, See Note 6, 25°C 7
Large-signal differential voltage amplification (VDD = 10 V, 25°C) AVD 10 36 V/mV RL = 10 kΩ, See Note 6, 25°C 7
Large-signal differential voltage amplification (VDD = 5 V, -40°C) AVD 3.5 32 V/mV RL = 10 kΩ, See Note 6, -40°C 7
Large-signal differential voltage amplification (VDD = 10 V, -40°C) AVD 7 46 V/mV RL = 10 kΩ, See Note 6, -40°C 7
Large-signal differential voltage amplification (VDD = 5 V, 85°C) AVD 3.5 19 V/mV RL = 10 kΩ, See Note 6, 85°C 7
Large-signal differential voltage amplification (VDD = 10 V, 85°C) AVD 7 31 V/mV RL = 10 kΩ, See Note 6, 85°C 7
Common-mode rejection ratio (VDD = 5 V, 25°C) CMRR 65 80 dB VIC = VICRmin, 25°C 7
Common-mode rejection ratio (VDD = 10 V, 25°C) CMRR 65 85 dB VIC = VICRmin, 25°C 7
Common-mode rejection ratio (VDD = 5 V, -40°C) CMRR 60 81 dB VIC = VICRmin, -40°C 7
Common-mode rejection ratio (VDD = 10 V, -40°C) CMRR 60 87 dB VIC = VICRmin, -40°C 7
Common-mode rejection ratio (VDD = 5 V, 85°C) CMRR 60 86 dB VIC = VICRmin, 85°C 7
Common-mode rejection ratio (VDD = 10 V, 85°C) CMRR 60 88 dB VIC = VICRmin, 85°C 7
Supply-voltage rejection ratio (25°C) kSVR 65 95 dB VDD = 5 V to 10 V, VO = 1.4 V, 25°C 7
Supply-voltage rejection ratio (25°C, VDD = 10 V column) kSVR 65 95 dB VDD = 5 V to 10 V, VO = 1.4 V, 25°C 7
Supply-voltage rejection ratio (-40°C, VDD = 5 V) kSVR 60 92 dB VDD = 5 V to 10 V, VO = 1.4 V, -40°C 7
Supply-voltage rejection ratio (-40°C, VDD = 10 V) kSVR 60 92 dB VDD = 5 V to 10 V, VO = 1.4 V, -40°C 7
Supply-voltage rejection ratio (85°C, VDD = 5 V) kSVR 60 96 dB VDD = 5 V to 10 V, VO = 1.4 V, 85°C 7
Supply-voltage rejection ratio (85°C, VDD = 10 V) kSVR 60 96 dB VDD = 5 V to 10 V, VO = 1.4 V, 85°C 7
Input current (BIAS SELECT) II(SEL) -1.4 -1.9 µA VI(SEL) = 0, 25°C 7
Supply current (VDD = 5 V, 25°C) IDD 675 1600 µA VO = VDD/2, VIC = VDD/2, no load, 25°C 7
Supply current (VDD = 10 V, 25°C) IDD 950 2000 µA VO = VDD/2, VIC = VDD/2, no load, 25°C 7
Supply current (VDD = 5 V, -40°C) IDD 950 2200 µA VO = VDD/2, VIC = VDD/2, no load, -40°C 7
Supply current (VDD = 10 V, -40°C) IDD 1375 2500 µA VO = VDD/2, VIC = VDD/2, no load, -40°C 7
Supply current (VDD = 5 V, 85°C) IDD 525 1200 µA VO = VDD/2, VIC = VDD/2, no load, 85°C 7
Supply current (VDD = 10 V, 85°C) IDD 725 1600 µA VO = VDD/2, VIC = VDD/2, no load, 85°C 7
Supply voltage VDD 18 V See Note 1 5
Input voltage range (any input) VI -0.3 V Upper limit is VDD 5
Input current II -5 5 mA 5
Output current IO -30 30 mA 5
Operating free-air temperature (I suffix) TA -40 85 °C I suffix 5
Storage temperature range Tstg -65 150 °C 5
Lead temperature (D or P package) 260 °C 1,6 mm (1/16 inch) from case for 10 seconds 5
Continuous total dissipation (D package) PD 725 mW TA ≤ 25°C 5
Supply voltage (I suffix) VDD 4 16 V I suffix 5
Common-mode input voltage (VDD = 5 V) VIC -0.2 3.5 V VDD = 5 V, I suffix 5
Common-mode input voltage (VDD = 10 V) VIC -0.2 8.5 V VDD = 10 V, I suffix 5
Operating free-air temperature (I suffix) TA -40 85 °C I suffix 5

CAD (KiCad official)

  • Symbol: TLC271BIDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlc271bidr-etched.step / tlc271bidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc271bidr.step / tlc271bidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (86 pp, sha256 462161034a481a4b, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF