component

TLC2274MDR

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifiers-comparatorstlc2274mdrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers tlc2274mdr: viewers · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json tlc2274mdr: specified limits as data (metadata.characteristics, 60 rows from the datasheet) · Ray 14d ago
README.md tlc2274mdr: specified limits as data (metadata.characteristics, 60 rows from the datasheet) · Ray 14d ago
tlc2274mdr-etched.glb tlc2274mdr: factory component page (tier=mfr) · Ray 17d ago
tlc2274mdr-etched.step tlc2274mdr: factory component page (tier=mfr) · Ray 17d ago
tlc2274mdr-hero.glb tlc2274mdr: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
tlc2274mdr-hero.overlay.json Publish 0.1.0 · Ray 17d ago
tlc2274mdr.glb Publish 0.1.0 · Ray 17d ago
tlc2274mdr.kicad_mod Publish 0.1.0 · Ray 17d ago
tlc2274mdr.kicad_sym Publish 0.1.0 · Ray 17d ago
tlc2274mdr.lbr Publish 0.1.0 · Ray 17d ago
tlc2274mdr.step Publish 0.1.0 · Ray 17d ago

TLC2274MDR

Texas Instruments · Operational Amplifier · SOIC-14

TLC2274MDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier channel 1.
2 1IN- input Inverting input of amplifier channel 1.
3 1IN+ input Non-inverting input of amplifier channel 1.
4 VDD+ power_in Positive (highest) supply pin.
5 2IN+ input Non-inverting input of amplifier channel 2.
6 2IN- input Inverting input of amplifier channel 2.
7 2OUT output Output of amplifier channel 2.
8 3OUT output Output of amplifier channel 3.
9 3IN- input Inverting input of amplifier channel 3.
10 3IN+ input Non-inverting input of amplifier channel 3.
11 VDD- power_in Negative (lowest) supply pin.
12 4IN+ input Non-inverting input of amplifier channel 4.
13 4IN- input Inverting input of amplifier channel 4.
14 4OUT output Output of amplifier channel 4.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage, TA = 25°C (5 V) VIO 300 2500 µV TA = 25°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 9
Input offset voltage, full range (5 V) VIO 3000 µV Full range (TA = −55°C to 125°C); VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 9
Input offset current, all level parts, TA = 25°C (5 V) IIO 0.5 60 pA All level parts, TA = 25°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 9
Input offset current, M level (5 V) IIO 800 pA M level part, TA = −55°C to 125°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 9
Input bias current, all level parts, TA = 25°C (5 V) IIB 1 60 pA All level parts, TA = 25°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 9
Input bias current, M level (5 V) IIB 800 pA M level part, TA = −55°C to 125°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 9
Common-mode input voltage range (5 V) VICR -0.3 2.5 4 V RS = 50 Ω; /VIO/ ≤ 5 mV; TA = 25°C 9
High-level output voltage (5 V) VOH 4.99 V IOH = −20 μA 9
High-level output voltage (5 V) VOH 4.85 4.93 V IOH = −200 μA; TA = 25°C 9
High-level output voltage (5 V) VOH 4.25 4.65 V IOH = −1 mA; TA = 25°C 9
Low-level output voltage (5 V) VOL 0.01 V VIC = 2.5 V; IOL = 50 μA 10
Low-level output voltage (5 V) VOL 0.09 0.15 V VIC = 2.5 V; IOL = 500 μA; TA = 25°C 10
Low-level output voltage (5 V) VOL 0.9 1.5 V VIC = 2.5 V; IOL = 5 mA; TA = 25°C 10
Large-signal differential voltage amplification, TA = 25°C (5 V) AVD 10 35 V/mV VIC = 2.5 V, VO = 1 V to 4 V; RL = 10 kΩ; TA = 25°C 10
Large-signal differential voltage amplification, full range (5 V) AVD 10 V/mV VIC = 2.5 V, VO = 1 V to 4 V; RL = 10 kΩ; TA = −55°C to 125°C 10
Common-mode rejection ratio, TA = 25°C (5 V) CMRR 70 75 dB VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 Ω; TA = 25°C 10
Common-mode rejection ratio, full range (5 V) CMRR 70 dB VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 Ω; full range 10
Supply-voltage rejection ratio, TA = 25°C (5 V) kSVR 80 95 dB VDD = 4.4 V to 16 V, VIC = VDD/2, no load; TA = 25°C 10
Supply-voltage rejection ratio, full range (5 V) kSVR 80 dB VDD = 4.4 V to 16 V, VIC = VDD/2, no load; full range 10
Supply current, TA = 25°C (5 V) IDD 4.4 6 mA VO = 2.5 V, no load; TA = 25°C 10
Supply current, full range (5 V) IDD 6 mA VO = 2.5 V, no load; full range 10
Slew rate at unity gain, TA = 25°C (5 V) SR 2.3 3.6 V/µs VO = 0.5 V to 2.5 V, RL = 10 kΩ, CL = 100 pF; TA = 25°C 10
Slew rate at unity gain, full range (5 V) SR 1.7 V/µs VO = 0.5 V to 2.5 V, RL = 10 kΩ, CL = 100 pF; full range 10
Input offset voltage, TA = 25°C (±5 V) VIO 300 2500 µV TA = 25°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 11
Input offset voltage, full range (±5 V) VIO 3000 µV Full range (TA = −55°C to 125°C); VIC = 0 V, VO = 0 V, RS = 50 Ω 11
Input offset current, all level parts, TA = 25°C (±5 V) IIO 0.5 60 pA All level parts, TA = 25°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 11
Input offset current, M level (±5 V) IIO 800 pA M level part, TA = −55°C to 125°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 11
Input bias current, all level parts, TA = 25°C (±5 V) IIB 1 60 pA All level parts, TA = 25°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 11
Input bias current, M level (±5 V) IIB 800 pA M level part, TA = −55°C to 125°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 11
Common-mode input voltage range (±5 V) VICR -5.3 0 4 V RS = 50 Ω; /VIO/ ≤ 5 mV; TA = 25°C 11
Maximum positive peak output voltage (±5 V) VOM+ 4.99 V IO = −20 μA 11
Maximum positive peak output voltage (±5 V) VOM+ 4.85 4.93 V IO = −200 μA; TA = 25°C 11
Maximum positive peak output voltage (±5 V) VOM+ 4.25 4.65 V IO = −1 mA; TA = 25°C 11
Maximum negative peak output voltage (±5 V) VOM- -4.99 V VIC = 0 V; IO = 50 μA 11
Maximum negative peak output voltage (±5 V) VOM- -4.91 -4.85 V VIC = 0 V; IO = 500 μA; TA = 25°C 11
Maximum negative peak output voltage (±5 V) VOM- -4.1 -3.5 V VIC = 0 V; IO = 5 mA; TA = 25°C 11
Large-signal differential voltage amplification, TA = 25°C (±5 V) AVD 20 50 V/mV VO = ±4 V; RL = 10 kΩ; TA = 25°C 11
Large-signal differential voltage amplification, full range (±5 V) AVD 20 V/mV VO = ±4 V; RL = 10 kΩ; TA = −55°C to 125°C 11
Common-mode rejection ratio, TA = 25°C (±5 V) CMRR 75 80 dB VIC = −5 V to 2.7 V, VO = 0 V, RS = 50 Ω; TA = 25°C 11
Common-mode rejection ratio, full range (±5 V) CMRR 75 dB VIC = −5 V to 2.7 V, VO = 0 V, RS = 50 Ω; full range 11
Supply-voltage rejection ratio, TA = 25°C (±5 V) kSVR 80 95 dB VDD+ = 2.2 V to ±8 V, VIC = 0 V, no load; TA = 25°C 11
Supply-voltage rejection ratio, full range (±5 V) kSVR 80 dB VDD+ = 2.2 V to ±8 V, VIC = 0 V, no load; full range 11
Supply current, TA = 25°C (±5 V) IDD 4.8 6 mA VO = 0 V, no load; TA = 25°C 11
Supply current, full range (±5 V) IDD 6 mA VO = 0 V, no load; full range 11
Slew rate at unity gain, TA = 25°C (±5 V) SR 2.3 3.6 V/µs VO = ±2.3 V, RL = 10 kΩ, CL = 100 pF; TA = 25°C 12
Slew rate at unity gain, full range (±5 V) SR 1.7 V/µs VO = ±2.3 V, RL = 10 kΩ, CL = 100 pF; full range 12
Supply voltage, VDD+ (absolute maximum) VDD+ 8 V 5
Supply voltage, VDD- (absolute maximum) VDD- -8 V 5
Differential input voltage (absolute maximum) VID -16 16 V 5
Input current, any input (absolute maximum) II -5 5 mA any input 5
Output current (absolute maximum) IO -50 50 mA 5
Total current into VDD+ (absolute maximum) -50 50 mA 5
Total current out of VDD- (absolute maximum) -50 50 mA 5
Storage temperature (absolute maximum) Tstg -65 150 °C 5
ESD, human-body model V(ESD) -2000 2000 V HBM per AEC Q100-002; M-grade devices in D and PW packages 5
Supply voltage, VDD± (recommended) VDD± 2.2 8 V M level parts 5
Operating free-air temperature, TA (recommended) TA -55 125 °C M level parts 6
Junction-to-ambient thermal resistance, D (SOIC-14) RθJA 83.8 °C/W TA = −55°C to 125°C 6
Junction-to-case (top) thermal resistance, D (SOIC-14) RθJC(top) 43.2 °C/W TA = −55°C to 125°C 6
Junction-to-board thermal resistance, D (SOIC-14) RθJB 38.4 °C/W TA = −55°C to 125°C 6

CAD (KiCad official)

  • Symbol: TLC2274MDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tlc2274mdr-etched.step / tlc2274mdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc2274mdr.step / tlc2274mdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (62 pp, sha256 b55a188c31bedc86, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF