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TLC2272QDRQ1

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Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLC2272QDRQ1

Texas Instruments · Operational Amplifier · SOIC-8

TLC2272QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of channel 1 of the TLC2272-Q1 dual op amp.
2 1IN- input Inverting input of channel 1.
3 1IN+ input Noninverting input of channel 1.
4 VDD- power_in Negative (lowest) supply rail.
5 2IN+ input Noninverting input of channel 2.
6 2IN- input Inverting input of channel 2.
7 2OUT output Output of channel 2 of the TLC2272-Q1 dual op amp.
8 VDD+ power_in Positive (highest) supply rail.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage, TA = 25°C (VDD = 5 V table) VIO 300 2500 µV TA = 25°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 5
Input offset voltage, full range (VDD = 5 V table) VIO 3000 µV Full range (TA = -40°C to 125°C); VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 5
Input offset current, TA = 25°C (VDD = 5 V table) IIO 0.5 60 pA TA = 25°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 5
Input offset current, full range (VDD = 5 V table) IIO 800 pA Full range (TA = -40°C to 125°C); VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 5
Input bias current, TA = 25°C (VDD = 5 V table) IIB 1 60 pA TA = 25°C; VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 5
Input bias current, full range (VDD = 5 V table) IIB 800 pA Full range (TA = -40°C to 125°C); VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 5
Common-mode input voltage range, TA = 25°C (VDD = 5 V table) VICR -0.3 2.5 4 V RS = 50 Ω; /VIO/ ≤ 5 mV 5
Common-mode input voltage range, full range (VDD = 5 V table) VICR 0 2.5 3.5 V Full range (TA = -40°C to 125°C); RS = 50 Ω; /VIO/ ≤ 5 mV 5
High-level output voltage, TA = 25°C (VDD = 5 V table) VOH 4.85 4.93 V IOH = −200 µA; TA = 25°C 5
High-level output voltage, full range (VDD = 5 V table) VOH 4.85 V IOH = −200 µA; Full range (TA = -40°C to 125°C) 5
High-level output voltage, TA = 25°C (VDD = 5 V table) VOH 4.25 4.65 V IOH = −1 mA; TA = 25°C 5
High-level output voltage, full range (VDD = 5 V table) VOH 4.25 V IOH = −1 mA; Full range (TA = -40°C to 125°C) 5
Low-level output voltage, TA = 25°C (VDD = 5 V table) VOL 0.09 0.15 V VIC = 2.5 V; IOL = 500 µA; TA = 25°C 5
Low-level output voltage, full range (VDD = 5 V table) VOL 0.15 V VIC = 2.5 V; IOL = 500 µA; Full range (TA = -40°C to 125°C) 5
Low-level output voltage, TA = 25°C (VDD = 5 V table) VOL 0.9 1.5 V VIC = 2.5 V; IOL = 5 mA; TA = 25°C 5
Large-signal differential voltage amplification, TA = 25°C (VDD = 5 V table) AVD 10 35 V/mV VIC = 2.5 V, VO = 1 V to 4 V, RL = 10 kΩ; TA = 25°C 5
Common-mode rejection ratio, TA = 25°C (VDD = 5 V table) CMRR 70 75 dB VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 Ω; TA = 25°C 5
Supply-voltage rejection ratio, TA = 25°C (VDD = 5 V table) kSVR 80 95 dB VDD = 4.4 V to 16 V, VIC = VDD / 2, no load; TA = 25°C 5
Supply current, TA = 25°C (VDD = 5 V table) IDD 2.2 3 mA VO = 2.5 V, no load; TA = 25°C 6
Supply current, full range (VDD = 5 V table) IDD 3 mA VO = 2.5 V, no load; Full range (TA = -40°C to 125°C) 6
Slew rate at unity gain, TA = 25°C (VDD = 5 V table) SR 2.3 3.6 V/µs VO = 0.5 V to 2.5 V, RL = 10 kΩ, CL = 100 pF; TA = 25°C 6
Slew rate at unity gain, full range (VDD = 5 V table) SR 1.7 V/µs VO = 0.5 V to 2.5 V, RL = 10 kΩ, CL = 100 pF; Full range (TA = -40°C to 125°C) 6
Input offset voltage, TA = 25°C (VDD± = ±5 V table) VIO 300 2500 µV TA = 25°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 6
Input offset voltage, full range (VDD± = ±5 V table) VIO 3000 µV Full range (TA = -40°C to 125°C); VIC = 0 V, VO = 0 V, RS = 50 Ω 6
Input offset current, TA = 25°C (VDD± = ±5 V table) IIO 0.5 60 pA TA = 25°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 6
Input offset current, full range (VDD± = ±5 V table) IIO 800 pA Full range (TA = -40°C to 125°C); VIC = 0 V, VO = 0 V, RS = 50 Ω 6
Input bias current, TA = 25°C (VDD± = ±5 V table) IIB 1 60 pA TA = 25°C; VIC = 0 V, VO = 0 V, RS = 50 Ω 6
Input bias current, full range (VDD± = ±5 V table) IIB 800 pA Full range (TA = -40°C to 125°C); VIC = 0 V, VO = 0 V, RS = 50 Ω 6
Common-mode input voltage range, TA = 25°C (VDD± = ±5 V table) VICR -5.3 0 4 V RS = 50 Ω; /VIO/ ≤ 5 mV 6
Common-mode input voltage range, full range (VDD± = ±5 V table) VICR -5 0 3.5 V Full range (TA = -40°C to 125°C); RS = 50 Ω; /VIO/ ≤ 5 mV 6
Maximum positive peak output voltage, TA = 25°C (VDD± = ±5 V table) VOM+ 4.85 4.93 V IO = −200 µA; TA = 25°C 6
Maximum positive peak output voltage, full range (VDD± = ±5 V table) VOM+ 4.85 V IO = −200 µA; Full range (TA = -40°C to 125°C) 6
Maximum positive peak output voltage, TA = 25°C (VDD± = ±5 V table) VOM+ 4.25 4.65 V IO = −1 mA; TA = 25°C 6
Maximum positive peak output voltage, full range (VDD± = ±5 V table) VOM+ 4.25 V IO = −1 mA; Full range (TA = -40°C to 125°C) 6
Maximum negative peak output voltage, TA = 25°C (VDD± = ±5 V table) VOM- -4.91 -4.85 V VIC = 0 V; IO = 500 µA; TA = 25°C 7
Maximum negative peak output voltage, full range (VDD± = ±5 V table) VOM- -4.85 V VIC = 0 V; IO = 500 µA; Full range (TA = -40°C to 125°C) 7
Maximum negative peak output voltage, TA = 25°C (VDD± = ±5 V table) VOM- -4.1 -3.5 V VIC = 0 V; IO = 5 mA; TA = 25°C 7
Maximum negative peak output voltage, full range (VDD± = ±5 V table) VOM- -3.5 V VIC = 0 V; IO = 5 mA; Full range (TA = -40°C to 125°C) 7
Large-signal differential voltage amplification, TA = 25°C (VDD± = ±5 V table) AVD 20 50 V/mV VO = ±4 V, RL = 10 kΩ; TA = 25°C 7
Common-mode rejection ratio, TA = 25°C (VDD± = ±5 V table) CMRR 75 80 dB VIC = -5 V to 2.7 V, VO = 0 V, RS = 50 Ω; TA = 25°C 7
Supply-voltage rejection ratio, TA = 25°C (VDD± = ±5 V table) kSVR 80 95 dB VDD+ = 2.2 V to ±8 V, VIC = 0 V, no load; TA = 25°C 7
Supply current, TA = 25°C (VDD± = ±5 V table) IDD 2.4 3 mA VO = 0 V, no load; TA = 25°C 7
Supply current, full range (VDD± = ±5 V table) IDD 3 mA VO = 0 V, no load; Full range (TA = -40°C to 125°C) 7
Slew rate at unity gain, TA = 25°C (VDD± = ±5 V table) SR 2.3 3.6 V/µs VO = ±2.3 V, RL = 10 kΩ, CL = 100 pF; TA = 25°C 7
Slew rate at unity gain, full range (VDD± = ±5 V table) SR 1.7 V/µs VO = ±2.3 V, RL = 10 kΩ, CL = 100 pF; Full range (TA = -40°C to 125°C) 7
Supply voltage, VDD+ VDD+ 8 V 4
Supply voltage, VDD− VDD- -8 V 4
Differential input voltage, VID VID -16 16 V Differential voltages are at IN+ with respect to IN- 4
Input current, II (any input) II -5 5 mA 4
Output current, IO IO -50 50 mA 4
Total current into VDD+ -50 50 mA 4
Total current out of VDD− -50 50 mA 4
Operating free-air temperature range TA -40 125 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage, dual supply VDD± 2.2 8 V Dual supply, printed as ±2.2 V to ±8 V; single supply 4.4 V to 16 V is stated in text only 4
Junction-to-ambient thermal resistance, D (SOIC-8) RθJA 115.6 °C/W D (SOIC) 8-pin package 5
Junction-to-case (top) thermal resistance, D (SOIC-8) RθJC(top) 61.8 °C/W D (SOIC) 8-pin package 5
Junction-to-board thermal resistance, D (SOIC-8) RθJB 55.9 °C/W D (SOIC) 8-pin package 5
Junction-to-top characterization parameter, D (SOIC-8) ψJT 14.3 °C/W D (SOIC) 8-pin package 5
Junction-to-board characterization parameter, D (SOIC-8) ψJB 55.4 °C/W D (SOIC) 8-pin package 5

CAD (KiCad official)

  • Symbol: TLC2272QDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlc2272qdrq1-etched.step / tlc2272qdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc2272qdrq1.step / tlc2272qdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 0590a6b2769067e5, retrieved 2026-10-28, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF