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TLC2272ACDR

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by adom

UMW Operational Amplifier, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tlc2272acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers tlc2272acdr: viewers · Ray 29d ago
package.json Publish 0.1.0 · Ray 29d ago
page.json tlc2272acdr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 18h ago
README.md tlc2272acdr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
tlc2272acdr-etched.fit.json tlc2272acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlc2272acdr-etched.glb tlc2272acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlc2272acdr-etched.step tlc2272acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlc2272acdr.glb Publish 0.1.0 · Ray 29d ago
tlc2272acdr.kicad_mod Publish 0.1.0 · Ray 29d ago
tlc2272acdr.kicad_sym Publish 0.1.0 · Ray 29d ago
tlc2272acdr.lbr Publish 0.1.0 · Ray 29d ago
tlc2272acdr.step Publish 0.1.0 · Ray 29d ago

TLC2272ACDR

UMW · Operational Amplifier · SOP-8

TLC2272ACDR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of channel 1 op-amp. Rail-to-rail output stage; short-circuit current limited, output current rated ±50 mA absolute maximum.
2 1IN- input Inverting input of channel 1 op-amp. High-impedance CMOS input, typical input bias current 1 pA. Do not drive below VDD- - 0.3 V.
3 1IN+ input Non-inverting input of channel 1 op-amp. Common-mode input voltage range includes the negative rail (VDD- to VDD+ - 1.5 V typical).
4 VDD-/GND power_in Negative (lowest) supply rail. Tie to GND in single-supply operation or to the negative rail in split-supply operation. Supply range VDD+ up to 8 V, VDD- down to -8 V absolute maximum.
5 2IN+ input Non-inverting input of channel 2 op-amp. High-impedance CMOS input, common-mode range includes negative rail.
6 2IN- input Inverting input of channel 2 op-amp. High-impedance CMOS input, typical input bias current 1 pA.
7 2OUT output Output of channel 2 op-amp. Rail-to-rail output stage; short-circuit current limited.
8 VDD+ power_in Positive (highest) supply rail. Absolute maximum 8 V referenced to VDD-/GND midpoint; typical characterization at VDD=5 V (single) or ±2.5 V (split).

Key specifications

Parameter Value
Manufacturer UMW
Package SOP-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TLC2272ACDR
  • TLC2272ACDRIDR
  • TLC2272ACDRAIDR
  • TLC2274CDR
  • TLC2274ACDR
  • TLC2274IDR

CAD (KiCad official)

  • Symbol: TLC2272ACDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tlc2272acdr-etched.step / tlc2272acdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc2272acdr.step / tlc2272acdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (30 pp, sha256 ead5615846e4c74e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF