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TLC2264IN

Public Made by Adom

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Texas Instruments Operational Amplifier, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierstlc2264infactory-2.0.0extractor-text

Verified TLC2264IN

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLC2264IN · PDIP-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 80-page datasheet
  • ✓distributor: lcsc C1348073, digikey 296-7107-5-ND, mouser 595-TLC2264IN
  • ✓family: DIP-14_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-d0_htyok/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlc2264in.kicad_sym✓ tlc2264in.kicad_mod✓ tlc2264in.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers tlc2264in: viewers · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
tlc2264in-etched.glb Publish 0.1.0 · Ray 3d ago
tlc2264in-etched.step tlc2264in: factory component page (tier=mfr) · Ray 3d ago
tlc2264in-hero.glb tlc2264in: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
tlc2264in-hero.overlay.json Publish 0.1.0 · Ray 3d ago
tlc2264in.glb Publish 0.1.0 · Ray 3d ago
tlc2264in.kicad_mod Publish 0.1.0 · Ray 3d ago
tlc2264in.kicad_sym Publish 0.1.0 · Ray 3d ago
tlc2264in.lbr Publish 0.1.0 · Ray 3d ago
tlc2264in.step Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 3d ago

TLC2264IN

Texas Instruments · Operational Amplifier · PDIP-14

TLC2264IN from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier 1, which swings rail-to-rail per the datasheet's output-swing feature.
2 1IN- input Inverting input of amplifier 1.
3 1IN+ input Non-inverting input of amplifier 1; the common-mode input range includes the negative rail.
4 VDD+ power_in Positive supply rail (VCC+) for the device, used for single-supply or split-supply operation.
5 2IN+ input Non-inverting input of amplifier 2.
6 2IN- input Inverting input of amplifier 2.
7 2OUT output Output of amplifier 2, which swings rail-to-rail per the datasheet's output-swing feature.
8 3OUT output Output of amplifier 3, which swings rail-to-rail per the datasheet's output-swing feature.
9 3IN- input Inverting input of amplifier 3.
10 3IN+ input Non-inverting input of amplifier 3.
11 VDD-/GND power_in Negative supply rail (VCC-/GND) for the device, which is ground in single-supply operation.
12 4IN+ input Non-inverting input of amplifier 4.
13 4IN- input Inverting input of amplifier 4.
14 4OUT output Output of amplifier 4, which swings rail-to-rail per the datasheet's output-swing feature.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Amplifiers
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (VDD = 5 V) VIO 300 2500 µV TA = 25°C 18
Input offset voltage (VDD = 5 V, full range) VIO 3000 µV Full range (−40°C to 125°C) 18
Input offset current (full range) IIO 800 pA Full range (−40°C to 125°C) 18
Input bias current (full range) IIB 800 pA Full range (−40°C to 125°C) 18
Common-mode input voltage range (VDD = 5 V) VICR -0.3 4.2 V TA = 25°C, RS = 50 Ω, /VIO/ ≤ 5 mV 18
Common-mode input voltage range (VDD = 5 V, full range) VICR 0 3.5 V Full range, RS = 50 Ω, /VIO/ ≤ 5 mV 18
High-level output voltage VOH 4.99 V IOH = −20 µA, TA = 25°C 18
High-level output voltage VOH 4.85 4.94 V IOH = 100 µA, TA = 25°C 18
High-level output voltage VOH 4.82 V IOH = −100 µA, full range 18
High-level output voltage VOH 4.7 4.85 V IOH = 400 µA, TA = 25°C 18
High-level output voltage VOH 4.5 V IOH = −400 µA, full range 18
Low-level output voltage VOL 0.09 0.15 V VIC = 2.5 V, IOL = 500 µA, TA = 25°C 18
Low-level output voltage VOL 0.15 V VIC = 2.5 V, IOL = 500 µA, full range 18
Low-level output voltage VOL 0.8 1 V VIC = 2.5 V, IOL = 4 A (as printed), TA = 25°C 18
Low-level output voltage VOL 1.2 V VIC = 2.5 V, IOL = 4 A (as printed), full range 18
Large-signal differential voltage amplification (VDD = 5 V) AVD 80 100 V/mV VIC = 2.5 V, VO = 1 V to 4 V, RL = 50 kΩ, TA = 25°C 18
Large-signal differential voltage amplification (VDD = 5 V, full range) AVD 50 V/mV VIC = 2.5 V, VO = 1 V to 4 V, RL = 50 kΩ, full range 18
Common-mode rejection ratio (VDD = 5 V) CMRR 70 83 dB VIC = 0 to 2.7 V, VO = 2.5 V, RS = 50 Ω, TA = 25°C 18
Common-mode rejection ratio (VDD = 5 V, full range) CMRR 70 dB VIC = 0 to 2.7 V, VO = 2.5 V, RS = 50 Ω, full range 18
Supply-voltage rejection ratio (VDD = 5 V) kSVR 80 95 dB VDD = 4.4 V to 16 V, VIC = VDD/2, no load, TA = 25°C 18
Supply-voltage rejection ratio (VDD = 5 V, full range) kSVR 80 dB VDD = 4.4 V to 16 V, VIC = VDD/2, no load, full range 18
Supply current (four amplifiers, VDD = 5 V) IDD 0.8 1 mA VO = 2.5 V, no load, TA = 25°C 19
Supply current (four amplifiers, VDD = 5 V, full range) IDD 1 mA VO = 2.5 V, no load, full range 19
Slew rate at unity gain (VDD = 5 V) SR 0.35 0.55 V/µs VO = 1.4 V to 2.6 V, RL = 50 kΩ, CL = 100 pF, TA = 25°C 19
Slew rate at unity gain (VDD = 5 V, full range) SR 0.25 V/µs VO = 1.4 V to 2.6 V, RL = 50 kΩ, CL = 100 pF, full range 19
Common-mode input voltage range (VDD± = ±5 V) VICR -5.3 4.2 V TA = 25°C, RS = 50 Ω, /VIO/ ≤ 5 mV 20
Common-mode input voltage range (VDD± = ±5 V, full range) VICR -5 3.5 V Full range, RS = 50 Ω, /VIO/ ≤ 5 mV 20
Maximum positive peak output voltage (VDD± = ±5 V) VOM+ 4.99 V IO = −20 µA, TA = 25°C 20
Maximum positive peak output voltage (VDD± = ±5 V) VOM+ 4.85 4.94 V IO = 100 µA, TA = 25°C 20
Maximum positive peak output voltage (VDD± = ±5 V) VOM+ 4.82 V IO = −100 µA, full range 20
Maximum positive peak output voltage (VDD± = ±5 V) VOM+ 4.7 4.85 V IO = 400 µA, TA = 25°C 20
Maximum positive peak output voltage (VDD± = ±5 V) VOM+ 4.5 V IO = −400 µA, full range 20
Large-signal differential voltage amplification (VDD± = ±5 V) AVD 80 200 V/mV VO = ±4 V, RL = 50 kΩ, TA = 25°C 20
Large-signal differential voltage amplification (VDD± = ±5 V, full range) AVD 50 V/mV VO = ±4 V, RL = 50 kΩ, full range 20
Common-mode rejection ratio (VDD± = ±5 V) CMRR 75 88 dB VIC = −5 V to 2.7 V, VO = 0 V, RS = 50 Ω, TA = 25°C 20
Common-mode rejection ratio (VDD± = ±5 V, full range) CMRR 75 dB VIC = −5 V to 2.7 V, VO = 0 V, RS = 50 Ω, full range 20
Supply-voltage rejection ratio (VDD± = ±5 V) kSVR 80 95 dB VDD± = ±2.2 V to ±8 V, VIC = VDD/2, no load, TA = 25°C 20
Supply-voltage rejection ratio (VDD± = ±5 V, full range) kSVR 80 dB VDD± = ±2.2 V to ±8 V, VIC = VDD/2, no load, full range 20
Supply current (four amplifiers, VDD± = ±5 V) IDD 0.85 1 mA VO = 0, no load, TA = 25°C 21
Supply current (four amplifiers, VDD± = ±5 V, full range) IDD 1 mA VO = 0, no load, full range 21
Slew rate at unity gain (VDD± = ±5 V) SR 0.35 0.55 V/µs RL = 50 kΩ, CL = 100 pF, TA = 25°C 21
Slew rate at unity gain (VDD± = ±5 V, full range) SR 0.25 V/µs RL = 50 kΩ, CL = 100 pF, full range 21
Supply voltage VDD± 2.2 8 V I suffix (±VDD) 5
Operating free-air temperature (I suffix) TA -40 125 °C I suffix 5
Supply voltage, VDD+ VDD+ 8 V Voltages referenced to midpoint of VDD+ and VDD−, see Note 1 5
Supply voltage, VDD− VDD- -8 V Voltages referenced to midpoint of VDD+ and VDD−, see Note 1 5
Differential input voltage VID -16 16 V See Note 2 5
Input current (each input) II -5 5 mA Each input 5
Output current IO -50 50 mA 5
Total current into VDD+ -50 50 mA 5
Total current out of VDD− -50 50 mA 5
Storage temperature range Tstg -65 150 °C 5
Lead temperature (N package, 10 s) 260 °C 1,6 mm (1/16 inch) from case for 10 seconds, D, N, P, PW packages 5
Continuous total dissipation (N package) PD 1150 mW TA ≤ 25°C; derating factor 9.2 mW/°C above 25°C 5

CAD (KiCad official)

  • Symbol: TLC2264IN
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: tlc2264in-etched.step / tlc2264in-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc2264in.step / tlc2264in.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (80 pp, sha256 94390a581849aaf8, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF