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TLC1543QDWR
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Texas Instruments Analog To Digital Converters (ADCs), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLC1543QDWR
Texas Instruments · Analog To Digital Converters (ADCs) · SOIC-20-300mil
TLC1543QDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Analog signal input A0; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 2 | A1 | input | Analog signal input A1; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 3 | A2 | input | Analog signal input A2; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 4 | A3 | input | Analog signal input A3; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 5 | A4 | input | Analog signal input A4; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 6 | A5 | input | Analog signal input A5; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 7 | A6 | input | Analog signal input A6; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 8 | A7 | input | Analog signal input A7; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 9 | A8 | input | Analog signal input A8; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 10 | GND | power_in | Ground return terminal for the internal circuitry; unless otherwise noted, all voltage measurements are with respect to this terminal. |
| 11 | A9 | input | Analog signal input A9; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 12 | A10 | input | Analog signal input A10; the 11 analog inputs are internally multiplexed and the driving source impedance should be less than or equal to 1 kΩ. |
| 13 | REF- | input | Lower reference voltage input, nominally ground; the maximum input voltage range is set by the difference between REF+ and REF-. |
| 14 | REF+ | input | Upper reference voltage input, nominally VCC; the maximum input voltage range is set by the difference between REF+ and REF-. |
| 15 | CS | input | Chip select; a high-to-low transition resets the internal counters and enables DATA OUT, ADDRESS, and I/O CLOCK within a maximum of a setup time plus two falling edges of the internal system clock, and a low-to-high transition disables ADDRESS and I/O CLOCK within a setup time plus two falling edges of the internal system clock. |
| 16 | DATA OUT | tri_state | 3-state serial output for the A/D conversion result; it is high-impedance when CS is high, and the LSB appears on the ninth falling edge of I/O CLOCK with DATA OUT driven low on the tenth falling edge. |
| 17 | ADDRESS | input | Serial address input; a 4-bit address (MSB first) is shifted in on the first four rising edges of I/O CLOCK and is ignored for the remainder of the conversion period. |
| 18 | I/O CLOCK | input | Input/output clock that loads the 4 address bits on its first four rising edges, starts sampling on the fourth falling edge, shifts out the previous result on DATA OUT, and transfers conversion control to the internal state controller on the falling edge of the tenth clock. |
| 19 | EOC | output | End-of-conversion output; it goes from high to low on the trailing edge of the tenth I/O CLOCK and stays low until the conversion is complete and data are ready for transfer. |
| 20 | VCC | power_in | Positive supply voltage; the excerpt does not state a numeric supply range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | ADC/DAC/Data Conversion |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TLC1543QDWR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
tlc1543qdwr-etched.step/tlc1543qdwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc1543qdwr.step/tlc1543qdwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
21179f2795a4475c, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).