# TLC0838CDWR

**Texas Instruments** · Analog To Digital Converters (ADC) · SOIC-20-300mil

TLC0838CDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH0 | input | Analog multiplexer input channel 0, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 2 | CH1 | input | Analog multiplexer input channel 1, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 3 | CH2 | input | Analog multiplexer input channel 2, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 4 | CH3 | input | Analog multiplexer input channel 3, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 5 | CH4 | input | Analog multiplexer input channel 4, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 6 | CH5 | input | Analog multiplexer input channel 5, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 7 | CH6 | input | Analog multiplexer input channel 6, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 8 | CH7 | input | Analog multiplexer input channel 7, selectable as single-ended, differential or pseudodifferential input through the serial address word; analog inputs must stay within the absolute maximum range of -0.3 V to VCC + 0.3 V. |
| 9 | COM | input | Common analog input used as the negative reference for pseudodifferential operation; its voltage may be any reference common to all channels and must stay within -0.05 V to VCC + 0.05 V. |
| 10 | DGTL GND | power_in | Digital ground for the logic and shift-register circuitry; absolute maximum voltages are referenced to the network ground terminal. |
| 11 | ANLG GND | power_in | Analog ground for the converter section (ladder and comparator), separate from the digital ground on pin 10. |
| 12 | REF | input | Voltage reference input with input resistance of 1.3 kΩ min, 2.4 kΩ typ and 5.9 kΩ max, allowing the reference to be reduced to encode a smaller analog span over the full 8 bits. |
| 13 | SE | input | Output-format control: when held high the LSB stays on DO after the MSB-first stream, and when forced low the data is clocked out LSB-first; SE low must be set up before CLK rising by at least 350 ns. |
| 14 | DO | tri_state | Serial data output that delivers the conversion result MSB first and goes to high impedance when CS is high; DI and DO may be tied together on one bidirectional line. |
| 15 | SARS | tri_state | SAR status output that goes high while a conversion is in progress and returns low after eight clock periods when the conversion is complete; it is high impedance when CS is high. |
| 16 | CLK | input | Serial clock input, specified from 10 kHz to 600 kHz with a 40% to 60% duty cycle, with data set-up of 350 ns and hold of 90 ns relative to CLK rising. |
| 17 | DI | input | Serial data input that shifts the start bit and multiplexer address word into the shift register on each CLK low-to-high transition; it is ignored during conversion. |
| 18 | CS | input | Chip select: a low level starts a conversion and must be held low for the whole conversion, while a high level clears all internal registers and places DO and SARS in high impedance; minimum high pulse duration is 220 ns. |
| 19 | NC | unconnected | No internal connection on this package. |
| 20 | VCC | power_in | Positive supply, recommended range 4.5 V to 5.5 V with 5 V nominal, and absolute maximum of 6.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Data Acquisition |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `TLC0838CDWR`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `tlc0838cdwr-etched.step` / `tlc0838cdwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc0838cdwr.step` / `tlc0838cdwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc0838) (19 pp, sha256 `7da8a03a60087fd9`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlc0838cdwr-datasheet.pdf)