component

TLC071IDR

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifiers-comparatorstlc071idrfactory-2.0.0extractor-text

Verified TLC071IDR

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLC071IDR · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 63-page datasheet
  • ✓distributor: lcsc C1848157, digikey 296-TLC071IDRTR-ND, mouser 595-TLC071IDR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-7p9nos6f/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlc071idr.kicad_sym✓ tlc071idr.kicad_mod✓ tlc071idr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3h ago
viewers tlc071idr: viewers · Ray 3h ago
package.json Publish 0.1.0 · Ray 3h ago
page.json Set visibility: public · Ray 3h ago
README.md Publish 0.1.0 · Ray 3h ago
tlc071idr-etched.glb Publish 0.1.0 · Ray 3h ago
tlc071idr-etched.step tlc071idr: factory component page (tier=mfr) · Ray 3h ago
tlc071idr-hero.glb tlc071idr: hero GLB from the etched model (keeps the MPN mark) · Ray 3h ago
tlc071idr-hero.overlay.json Publish 0.1.0 · Ray 3h ago
tlc071idr.glb Publish 0.1.0 · Ray 3h ago
tlc071idr.kicad_mod Publish 0.1.0 · Ray 3h ago
tlc071idr.kicad_sym Publish 0.1.0 · Ray 3h ago
tlc071idr.lbr Publish 0.1.0 · Ray 3h ago
tlc071idr.step Publish 0.1.0 · Ray 3h ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 3h ago

TLC071IDR

Texas Instruments · Operational Amplifier · SOIC-8

TLC071IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NULL passive Offset null terminal used for input offset voltage nulling, as the datasheet notes for its offset nulling pins.
2 IN− input Inverting input of the operational amplifier.
3 IN+ input Non-inverting input of the operational amplifier; common-mode input voltage range is VICR +0.5 V to VDD−0.8 V per the recommended operating conditions.
4 GND power_in Ground reference terminal; all voltages except differential voltages are specified with respect to GND.
5 NULL passive Offset null terminal used for input offset voltage nulling, as the datasheet notes for its offset nulling pins.
6 OUT output Amplifier output with high drive, rated IOH of 57 mA at VDD − 1.5 V and IOL of 55 mA at 0.5 V.
7 VDD power_in Positive supply; the recommended single-supply range is 4.5 V to 16 V.
8 NC unconnected No internal connection.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VIO 1900 μV VDD = 5 V, 25°C 5
Input offset voltage VIO 3000 μV VDD = 5 V, full range 5
Input offset voltage VIO 1900 μV VDD = 12 V, 25°C 8
Input offset voltage VIO 3000 μV VDD = 12 V, full range 8
Input offset current IIO 100 700 pA VDD = 5 V, TLC07xI, full range 5
Input offset current IIO 100 700 pA VDD = 12 V, TLC07xI, full range 8
Input bias current IIB 100 700 pA VDD = 5 V, TLC07xI, full range 5
Input bias current IIB 100 700 pA VDD = 12 V, TLC07xI, full range 8
Common-mode input voltage range VICR 0.5 4.2 V VDD = 5 V, RS = 50 Ω 5
Common-mode input voltage range VICR 0.5 11.2 V VDD = 12 V, RS = 50 Ω 8
High-level output voltage VOH 3.9 V VDD = 5 V, IOH = −1 mA, full range 5
High-level output voltage VOH 3.5 V VDD = 5 V, IOH = −20 mA, full range 5
High-level output voltage VOH 3.2 V VDD = 5 V, IOH = −35 mA, full range 5
High-level output voltage VOH 3 V VDD = 5 V, IOH = −50 mA, −40°C to 85°C 5
Low-level output voltage VOL 0.35 V VDD = 5 V, IOL = 1 mA, full range 5
Low-level output voltage VOL 0.45 V VDD = 5 V, IOL = 20 mA, full range 5
Low-level output voltage VOL 0.7 V VDD = 5 V, IOL = 35 mA, full range 5
High-level output voltage VOH 11 V VDD = 12 V, IOH = −1 mA, full range 8
High-level output voltage VOH 10.7 V VDD = 12 V, IOH = −20 mA, full range 8
High-level output voltage VOH 10.3 V VDD = 12 V, IOH = −35 mA, full range 8
Low-level output voltage VOL 0.35 V VDD = 12 V, IOL = 1 mA, full range 8
Low-level output voltage VOL 0.5 V VDD = 12 V, IOL = 20 mA, full range 8
Low-level output voltage VOL 0.6 V VDD = 12 V, IOL = 35 mA, full range 8
Low-level output voltage VOL 0.65 V VDD = 12 V, IOL = 50 mA, −40°C to 85°C 8
Large-signal differential voltage amplification AVD 100 dB VDD = 5 V, VO(PP) = 3 V, RL = 10 kΩ, full range 6
Large-signal differential voltage amplification AVD 120 dB VDD = 12 V, VO(PP) = 8 V, RL = 10 kΩ, full range 9
Common-mode rejection ratio CMRR 80 dB VDD = 5 V, VIC = 1 to 3 V, RS = 50 Ω, full range 6
Common-mode rejection ratio CMRR 80 dB VDD = 12 V, VIC = 1 to 10 V, RS = 50 Ω, full range 9
Supply voltage rejection ratio kSVR 80 dB VDD = 4.5 V to 16 V, VIC = VDD/2, full range 6
Supply voltage rejection ratio kSVR 80 dB VDD = 4.5 V to 16 V, VIC = VDD/2, full range 9
Supply current (per channel) IDD 2.5 mA VDD = 5 V, No load, 25°C 6
Supply current (per channel) IDD 3.5 mA VDD = 5 V, No load, full range 6
Supply current (per channel) IDD 2.9 mA VDD = 12 V, No load, 25°C 9
Supply current (per channel) IDD 3.5 mA VDD = 12 V, No load, full range 9
Positive slew rate at unity gain SR+ 9.5 V/μs VDD = 5 V, VO(PP) = 0.8 V, CL = 50 pF, RL = 10 kΩ, full range 7
Negative slew rate at unity gain SR− 10 V/μs VDD = 5 V, VO(PP) = 0.8 V, CL = 50 pF, RL = 10 kΩ, full range 7
Positive slew rate at unity gain SR+ 9.5 V/μs VDD = 12 V, VO(PP) = 2 V, CL = 50 pF, RL = 10 kΩ, full range 10
Negative slew rate at unity gain SR− 10 V/μs VDD = 12 V, VO(PP) = 2 V, CL = 50 pF, RL = 10 kΩ, full range 10
Temperature coefficient of input offset voltage αVIO 1.2 μV/°C VDD = 5 V, VIC = 2.5 V, VO = 2.5 V, RS = 50 Ω 5
Equivalent input noise voltage Vn 7 nV/√Hz f = 1 kHz, 25°C 7
Gain-bandwidth product 10 MHz f = 10 kHz, RL = 10 kΩ, 25°C 7
Phase margin φm 32 ° VDD = 5 V, RL = 10 kΩ, CL = 50 pF, 25°C 7
Phase margin φm 37 ° VDD = 12 V, RL = 10 kΩ, CL = 50 pF, 25°C 10
Short-circuit output current IOS 100 mA VDD = 5 V, sourcing, 25°C 5
Short-circuit output current IOS 150 mA VDD = 12 V, sourcing, 25°C 8
Output current IO 57 mA VOH = 1.5 V from positive rail, 25°C 5
Supply voltage, single supply VDD 4.5 16 V Single supply 4
Supply voltage, split supply VDD 2.25 8 V Split supply, ±VDD 4
Common-mode input voltage VICR 0.5 V Max is VDD − 0.8 V 4
Operating free-air temperature (I suffix) TA -40 125 °C I-suffix 4
Supply voltage, VDD VDD 17 V All voltages except differential are with respect to GND 4
Operating free-air temperature (I suffix) TA -40 125 °C I suffix 4
Maximum junction temperature TJ 150 °C 4
Storage temperature range Tstg -65 150 °C 4
Lead temperature 260 °C 1.6 mm (1/16 inch) from case for 10 seconds 4
Junction-to-ambient thermal resistance, D (8) θJA 176 °C/W D (8) package 4
Junction-to-case thermal resistance, D (8) θJC 38.3 °C/W D (8) package 4
Power rating, D (8) 710 mW D (8) package, TA ≤ 25°C 4

CAD (KiCad official)

  • Symbol: TLC071IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlc071idr-etched.step / tlc071idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc071idr.step / tlc071idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (63 pp, sha256 0129518e2bec43cd, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF