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TL7702BIP

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tl7702bipfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 29d ago
viewers tl7702bip: viewers · Ray 29d ago
package.json Publish 0.1.0 · Ray 29d ago
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README.md Publish 0.1.0 · Ray 29d ago
tl7702bip-etched.glb tl7702bip: factory component page (tier=lcsc) · Ray 29d ago
tl7702bip-etched.step tl7702bip: factory component page (tier=lcsc) · Ray 29d ago
tl7702bip-hero.glb tl7702bip: hero GLB from the etched model (keeps the MPN mark) · Ray 29d ago
tl7702bip-hero.overlay.json Publish 0.1.0 · Ray 29d ago
tl7702bip.glb Publish 0.1.0 · Ray 29d ago
tl7702bip.kicad_mod Publish 0.1.0 · Ray 29d ago
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tl7702bip.lbr Publish 0.1.0 · Ray 29d ago
tl7702bip.step Publish 0.1.0 · Ray 29d ago

TL7702BIP

Texas Instruments · Supervisor And Reset ICs · PDIP-8

TL7702BIP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF output Reference voltage output (VREF 2.48 V to 2.58 V at Iref = -500 µA, 25°C); a 0.1-µF decoupling capacitor on REF is recommended to reduce false triggering from noise.
2 RESIN input Reset input: when driven low, RESET goes high and ~{RESET} goes low; when high, the reset outputs respond to the SENSE voltage. VIH is 2 V to 18 V and VIL is 0 V to 0.8 V.
3 CT passive Timing capacitor connection that sets the reset pulse duration, td ≈ 2.6 × 10^4 × CT (CT in farads, td in seconds), counted from the moment SENSE exceeds the positive-going threshold.
4 GND power_in Ground reference; all device voltages are referenced to the network ground terminal.
5 ~{RESET} output Active-low reset output, open-collector, requiring a pullup resistor; recommended IOL is 20 mA maximum (absolute maximum 30 mA).
6 RESET output Active-high reset output, open-collector, requiring a pullup resistor; recommended IOH is -20 mA (absolute maximum -30 mA), and both outputs should be terminated with similar-value resistors.
7 SENSE input Undervoltage-monitored voltage input rated 0 V to 18 V; for the TL7702B the negative-going threshold VIT- is typically 2.53 V (2.48 V to 2.58 V over full temperature range) and hysteresis is typically 10 mV.
8 VCC power_in Supply voltage, recommended 3.6 V to 18 V (absolute maximum 20 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TL7702BIP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: tl7702bip-etched.step / tl7702bip-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl7702bip.step / tl7702bip.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 08789e8628c5397c, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF