Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TL7660IP

Texas Instruments · Charge Pumps · PDIP-8

TL7660IP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; this pin is not connected inside the device.
2 CAP+ passive Positive terminal of pump capacitor C1; when polarized capacitors are used, the positive terminal of C1 must be connected to terminal 2.
3 GND power_in Ground reference; the positive terminal of reservoir capacitor C2 must connect here, and the output must never go more positive than GND or the device can latch up.
4 CAP− passive Pump capacitor terminal on the negative side of the charge-pump capacitor network; the device needs only two external noncritical capacitors.
5 VOUT power_out Negative converter output (VOUT = -VCC in the inverting configuration); it must not be shorted to VCC above 5.5 V for extended periods, and a 1N914-type diode from VOUT to GND is recommended to prevent latch-up if VOUT goes positive of GND.
6 LV input Low-voltage regulator bypass: tie to GND for VIN below 3.5 V, and leave floating above 3.5 V; do not connect to GND above 3.5 V, and LV input current must not exceed 20 µA when VCC > 3.5 V.
7 OSC input Oscillator terminal: nominal 10 kHz at VCC = 5 V, reducible by adding an external capacitor from OSC to VCC, or overdriven by an external clock through a 1-kΩ series resistor (pump frequency is half the clock frequency).
8 VCC power_in Supply voltage: recommended operating range is 1.5 V to 10 V, with an absolute maximum of 10.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TL7660IP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: tl7660ip-etched.step / tl7660ip-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl7660ip.step / tl7660ip.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 f894cae2eb99e40e, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF