# TL751L12CDR

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

TL751L12CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated 12-V output (11.52 V to 12.48 V at 25°C) delivering 0 to 150 mA, requiring a 10-μF output capacitor with ESR below 0.4 Ω. |
| 2 | COMMON | power_in | Ground/common reference pin, connected internally with the other COMMON pins (3, 6, 7). |
| 3 | COMMON | power_in | Ground/common reference pin, connected internally with the other COMMON pins (2, 6, 7). |
| 4 | NC | unconnected | No internal connection. |
| 5 | ENABLE | input | Active-low TTL/CMOS-compatible enable input; high level (2 V to 15 V) disables the output into high impedance, low level is -0.3 V to 0.8 V at 25°C. |
| 6 | COMMON | power_in | Ground/common reference pin, connected internally with the other COMMON pins (2, 3, 7). |
| 7 | COMMON | power_in | Ground/common reference pin, connected internally with the other COMMON pins (2, 3, 6). |
| 8 | INPUT | power_in | Regulator input supply, 13 V to 26 V recommended for the 12-V version, with 60-V transient and -15 V continuous reverse rating tolerance as stated (26 V continuous max). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage |  | 11.52 | 12 | 12.48 | V | TJ = 25°C; VI = 13 V to 26 V, IO = 0 to 150 mA | 5 |
| Output voltage |  | 11.4 |  | 12.6 | V | TJ = 0°C to 125°C; VI = 13 V to 26 V, IO = 0 to 150 mA | 5 |
| Input regulation voltage |  |  | 15 | 30 | mV | VI = 14 V to 19 V | 5 |
| Input regulation voltage |  |  | 20 | 40 | mV | VI = 13 V to 26 V | 5 |
| Ripple rejection |  | 50 | 55 |  | dB | VI = 13 V to 23 V, f = 120 Hz | 5 |
| Output regulation voltage |  |  | 50 | 120 | mV | IO = 5 mA to 150 mA | 5 |
| Quiescent current |  |  | 10 | 12 | mA | IO = 150 mA | 5 |
| Quiescent current |  |  | 1 | 2 | mA | VI = 13 V to 26 V, IO = 10 mA, TJ = 0°C to 125°C | 5 |
| Quiescent current with ENABLE high |  |  |  | 0.5 | mA | ENABLE ≥ 2 V | 5 |
| Dropout voltage |  |  |  | 0.6 | V | IO = 150 mA | 5 |
| Input voltage | VI | 13 |  | 26 | V | TL75xL12 | 3 |
| High-level ENABLE input voltage | VIH | 2 |  | 15 | V |  | 3 |
| Low-level ENABLE input voltage | VIL | -0.3 |  | 0.8 | V | TJ = 25°C | 3 |
| Low-level ENABLE input voltage | VIL | -0.15 |  | 0.8 | V | TJ = 0°C to 125°C | 3 |
| Output current | IO | 0 |  | 150 | mA | TL75xLxx | 3 |
| Operating virtual junction temperature | TJ | 0 |  | 125 | °C | TL75xLxxC | 3 |
| Continuous input voltage |  |  |  | 26 | V |  | 3 |
| Transient input voltage |  |  |  | 60 | V | TA = 25°C | 3 |
| Continuous reverse input voltage |  | -15 |  |  | V |  | 3 |
| Transient reverse input voltage |  | -50 |  |  | V | t ≤ 100 ms | 3 |
| Operating virtual junction temperature | TJ |  |  | 150 | °C |  | 3 |
| Lead temperature |  |  |  | 260 | °C | 1,6 mm (1/16 in) for 10 s | 3 |
| Storage temperature range | Tstg | -65 |  | 150 | °C |  | 3 |
| Output noise voltage |  |  | 700 |  | μV | f = 10 Hz to 100 kHz | 5 |
| Dropout voltage |  |  | 0.2 |  | V | IO = 10 mA | 5 |
| Junction-to-case thermal resistance (SOIC D) | θJC |  | 39 |  | °C/W | High K, JESD 51-7 | 3 |
| Junction-to-ambient thermal resistance (SOIC D) | θJA |  | 97 |  | °C/W | High K, JESD 51-7 | 3 |

## CAD (KiCad official)

- Symbol: `TL751L12CDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tl751l12cdr-etched.step` / `tl751l12cdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tl751l12cdr.step` / `tl751l12cdr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tl751l) (28 pp, sha256 `44dddfd0860738c8`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tl751l12cdr-datasheet.pdf)