component
TL751L10CDR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
main
TL751L10CDR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TL751L10CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated 10-V output, sourcing up to 150 mA (IO = 0 to 150 mA) with internal overcurrent limiting and thermal overload protection. |
| 2 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 3 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 4 | NC | unconnected | No internal connection. |
| 5 | INPUT | power_in | Unregulated input supply; the TL751L10 operating input range is 11 V to 26 V, with 26 V continuous maximum and -15 V continuous reverse input rating. |
| 6 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 7 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 8 | ENABLE | input | TTL- and CMOS-compatible enable input; a high level (2 V to 15 V) places the regulator output in the high-impedance state and a low level must be 0.8 V or less. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VI | 11 | 26 | V | TL75xL10 variant | 3 | |
| High-level ENABLE input voltage | VIH | 2 | 15 | V | TL75xLxx | 3 | |
| Low-level ENABLE input voltage | VIL | -0.3 | 0.8 | V | TJ = 25°C | 3 | |
| Low-level ENABLE input voltage | VIL | -0.15 | 0.8 | V | TJ = 0°C to 125°C | 3 | |
| Output current | IO | 0 | 150 | mA | TL75xLxx | 3 | |
| Operating virtual junction temperature | TJ | 0 | 125 | °C | TL75xLxxC | 3 | |
| Continuous input voltage | 26 | V | 3 | ||||
| Transient input voltage | 60 | V | TA = 25°C | 3 | |||
| Continuous reverse input voltage | -15 | V | 3 | ||||
| Transient reverse input voltage | -50 | V | t ≤ 100 ms | 3 | |||
| Operating virtual junction temperature | TJ | 150 | °C | 3 | |||
| Lead temperature | 260 | °C | 1,6 mm (1/16 in) for 10 s | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Output voltage | 9.6 | 10 | 10.4 | V | TJ = 25°C; VI = 11 V to 26 V, IO = 0 to 150 mA | 5 | |
| Output voltage | 9.5 | 10.5 | V | TJ = 0°C to 125°C; VI = 11 V to 26 V, IO = 0 to 150 mA | 5 | ||
| Input regulation voltage | 10 | 25 | mV | VI = 12 V to 19 V | 5 | ||
| Input regulation voltage | 30 | 60 | mV | VI = 11 V to 26 V | 5 | ||
| Ripple rejection | 60 | 65 | dB | VI = 12 V to 22 V, f = 120 Hz | 5 | ||
| Output regulation voltage | 50 | 100 | mV | IO = 5 mA to 150 mA | 5 | ||
| Quiescent current | 1 | 2 | mA | VI = 11 V to 26 V, IO = 10 mA, TJ = 0°C to 125°C | 5 | ||
| Quiescent current | 10 | 12 | mA | IO = 150 mA | 5 | ||
| Dropout voltage | 0.2 | V | IO = 10 mA | 5 | |||
| Dropout voltage | 0.6 | V | IO = 150 mA | 5 | |||
| Output noise voltage | 700 | μV | f = 10 Hz to 100 kHz | 5 | |||
| Quiescent current with ENABLE | 0.5 | mA | ENABLE ≥ 2 V | 5 | |||
| Thermal resistance, junction-to-case | θJC | 39 | °C/W | SOIC (D), High K, JESD 51-7 | 3 | ||
| Thermal resistance, junction-to-ambient | θJA | 97 | °C/W | SOIC (D), High K, JESD 51-7 | 3 |
CAD (KiCad official)
- Symbol:
TL751L10CDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tl751l10cdr-etched.step/tl751l10cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl751l10cdr.step/tl751l10cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
44dddfd0860738c8, retrieved 2026-10-22, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TL751L10CDR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TL751L10CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated 10-V output, sourcing up to 150 mA (IO = 0 to 150 mA) with internal overcurrent limiting and thermal overload protection. |
| 2 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 3 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 4 | NC | unconnected | No internal connection. |
| 5 | INPUT | power_in | Unregulated input supply; the TL751L10 operating input range is 11 V to 26 V, with 26 V continuous maximum and -15 V continuous reverse input rating. |
| 6 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 7 | COMMON | power_in | Common (ground) return pin for the regulator, internally tied to the other COMMON pins. |
| 8 | ENABLE | input | TTL- and CMOS-compatible enable input; a high level (2 V to 15 V) places the regulator output in the high-impedance state and a low level must be 0.8 V or less. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VI | 11 | | 26 | V | TL75xL10 variant | 3 |
| High-level ENABLE input voltage | VIH | 2 | | 15 | V | TL75xLxx | 3 |
| Low-level ENABLE input voltage | VIL | -0.3 | | 0.8 | V | TJ = 25°C | 3 |
| Low-level ENABLE input voltage | VIL | -0.15 | | 0.8 | V | TJ = 0°C to 125°C | 3 |
| Output current | IO | 0 | | 150 | mA | TL75xLxx | 3 |
| Operating virtual junction temperature | TJ | 0 | | 125 | °C | TL75xLxxC | 3 |
| Continuous input voltage | | | | 26 | V | | 3 |
| Transient input voltage | | | | 60 | V | TA = 25°C | 3 |
| Continuous reverse input voltage | | -15 | | | V | | 3 |
| Transient reverse input voltage | | -50 | | | V | t ≤ 100 ms | 3 |
| Operating virtual junction temperature | TJ | | | 150 | °C | | 3 |
| Lead temperature | | | | 260 | °C | 1,6 mm (1/16 in) for 10 s | 3 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 3 |
| Output voltage | | 9.6 | 10 | 10.4 | V | TJ = 25°C; VI = 11 V to 26 V, IO = 0 to 150 mA | 5 |
| Output voltage | | 9.5 | | 10.5 | V | TJ = 0°C to 125°C; VI = 11 V to 26 V, IO = 0 to 150 mA | 5 |
| Input regulation voltage | | | 10 | 25 | mV | VI = 12 V to 19 V | 5 |
| Input regulation voltage | | | 30 | 60 | mV | VI = 11 V to 26 V | 5 |
| Ripple rejection | | 60 | 65 | | dB | VI = 12 V to 22 V, f = 120 Hz | 5 |
| Output regulation voltage | | | 50 | 100 | mV | IO = 5 mA to 150 mA | 5 |
| Quiescent current | | | 1 | 2 | mA | VI = 11 V to 26 V, IO = 10 mA, TJ = 0°C to 125°C | 5 |
| Quiescent current | | | 10 | 12 | mA | IO = 150 mA | 5 |
| Dropout voltage | | | 0.2 | | V | IO = 10 mA | 5 |
| Dropout voltage | | | 0.6 | | V | IO = 150 mA | 5 |
| Output noise voltage | | | 700 | | μV | f = 10 Hz to 100 kHz | 5 |
| Quiescent current with ENABLE | | | 0.5 | | mA | ENABLE ≥ 2 V | 5 |
| Thermal resistance, junction-to-case | θJC | | 39 | | °C/W | SOIC (D), High K, JESD 51-7 | 3 |
| Thermal resistance, junction-to-ambient | θJA | | 97 | | °C/W | SOIC (D), High K, JESD 51-7 | 3 |
## CAD (KiCad official)
- Symbol: `TL751L10CDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tl751l10cdr-etched.step` / `tl751l10cdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tl751l10cdr.step` / `tl751l10cdr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tl751l) (28 pp, sha256 `44dddfd0860738c8`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tl751l10cdr-datasheet.pdf)