component

TL5209DR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tl5209drfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tl5209dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers tl5209dr: viewers · Ray 1mo ago
package.json tl5209dr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json tl5209dr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/tl5209dr · Ray 1mo ago
tl5209dr-etched.fit.json tl5209dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tl5209dr-etched.glb tl5209dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tl5209dr-etched.step tl5209dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tl5209dr.glb Publish 0.1.0 · Ray 1mo ago
tl5209dr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tl5209dr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tl5209dr.lbr Publish 0.1.0 · Ray 1mo ago
tl5209dr.step Publish 0.1.0 · Ray 1mo ago

TL5209DR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

TL5209DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Active-high control input enabling regulator at VEN ≥2 V and disabling at VEN <0.4 V or when left open.
2 IN power_in Input supply voltage pin with operating range of 2.5 V to 16 V.
3 OUT power_out Regulated output voltage adjustable from 1.242 V to 6.75 V via resistor divider connected to ADJ/BYP pin, maximum 500 mA output current.
4 ADJ/BYP input Adjustment/Bypass pin providing 1.242 V internal reference for output voltage configuration via external resistor divider; optional 470 pF bypass capacitor supported for improved noise performance.
5 GND power_in Ground connection providing return path and circuit reference.
6 GND power_in Ground connection providing return path and circuit reference.
7 GND power_in Ground connection providing return path and circuit reference.
8 GND power_in Ground connection providing return path and circuit reference.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TL5209DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tl5209dr-etched.step / tl5209dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl5209dr.step / tl5209dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 5c8d91451ea1a3ed, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF