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TL494IN

HGSEMI · DC-DC Converters · DIP-16

TL494IN from HGSEMI, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPP input Error amplifier 1 non-inverting input, with input voltage range of -0.3 V to Vcc-2.0 V.
2 INNP input Error amplifier 1 inverting input, with input voltage range of -0.3 V to Vcc-2.0 V.
3 INfc input PWM comparator feedback input, with recommended feedback current of 0.3 mA maximum and a zero-duty input threshold of 4 to 4.5 V.
4 DTC input Dead-time control input, with zero-duty threshold of 3 to 3.3 V and input bias current of -2.0 to -10 µA for 0 to 5.25 V input.
5 CT passive Oscillator timing capacitor connection, recommended 0.00047 to 10 µF.
6 RT passive Oscillator timing resistor connection, recommended 1.8 to 500 kΩ.
7 GND power_in Ground.
8 C1 passive Output transistor 1 collector, rated up to 40 V and 200 mA.
9 E1 output Output transistor 1 emitter, sources or sinks up to 200 mA.
10 E2 output Output transistor 2 emitter, sources or sinks up to 200 mA.
11 C2 passive Output transistor 2 collector, rated up to 40 V and 200 mA.
12 Vcc power_in Supply voltage input, recommended 7.0 to 40 V (absolute maximum 40 V).
13 OUTcon input Output control input selecting push-pull or single-ended operation, with input current of 0.2 to 3.5 mA at Voc=Vref.
14 Vref power_out 5 V reference output (4.75 to 5.25 V) with recommended output current up to 10 mA.
15 INNP input Error amplifier 2 inverting input, with input voltage range of -0.3 V to Vcc-2.0 V.
16 INPP input Error amplifier 2 non-inverting input, with input voltage range of -0.3 V to Vcc-2.0 V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package DIP-16
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage Vcc 7 15 40 V 3
Collector output voltage Vc1;Vc2 40 V 3
Collector output current (single transistor) Ic1;Ic2 200 mA 3
Amplifier input voltage Vin -0.3 V 3
Feedback current Ifb 0.3 mA 3
Reference output current Iref 10 mA 3
Timing resistance RT 1.8 30 500 kΩ 3
Timing capacitance CT 0.00047 0.001 10 µF 3
Oscillation frequency fosc 1 40 200 kHz 3
Supply voltage Vcc 7 40 V 3
Collector output voltage Vc1;Vc2 40 V 3
Collector output current (single transistor) Ic1;Ic2 200 mA 3
Amplifier input voltage Vin -0.3 V 3
Power dissipation PD 500 mW Tamb≤45℃ 3
Operating ambient temperature (TL494I) Tamb -40 85 ℃ TL494I 3
Storage temperature Tstg -55 150 ℃ 3
Lead temperature (soldering) TLEAD 260 ℃ soldering 10s 3
Reference voltage Vref 4.75 5 5.25 V Io=1.0mA 4
Reference voltage drift over temperature Vref/T 1.3 2.6 % Tamb from MIN to MAX 4
Line regulation Reg line 2 25 mV Vcc=7.0V~40V 4
Load regulation Reg load 2 15 mV Io=1.0mA~10mA 4
Short-circuit output current Isc 32 mA Vref=0V, Tamb=25℃ 4
Collector off-state leakage current Ic(off) 2 100 µA Vcc=40V; Vce=40V 4
Emitter off-state leakage current Ie(off) -100 µA Vcc=40V; Vc=40V; Ve=0V 4
Collector-emitter saturation voltage (common emitter) Vc(sat) 1.1 1.3 V Ve=0V; Ic=200mA 4
Emitter-follower saturation voltage Ve(sat) 1.5 2.5 V Vc=15V; Ie=-200mA 4
Output control pin current IOCH 0.2 3.5 mA Voc=Vref 4
Output voltage rise time (common emitter) Tr 100 200 ns Test figure 3 4
Output voltage rise time (emitter follower) Tr 100 200 ns Test figure 4 4
Output voltage fall time (common emitter) Tf 25 100 ns Test figure 3 4
Output voltage fall time (emitter follower) Tf 40 100 ns Test figure 4 4
Input offset voltage Vio 2 10 mV Vo (pin3)=2.5V 4
Input offset current Iio 5 250 nA Vo (pin3)=2.5V 4
Input bias current IIB 0.1 1 µA Vo (pin3)=2.5V 4
Input common-mode voltage range VICR -0.3 V Vcc=7.0V~40V 4
Open-loop voltage gain GVOL 70 95 dB Vo=0.5V~3.5V; RL=2.0k; Vo=3.0V 4
Common-mode rejection ratio CMRR 65 90 dB Vcc=40V 4
Output sink current (error amplifier) Io- 0.3 0.7 mA Vo (pin3)=0.7V 4
Output source current (error amplifier) Io+ -2 -4 mA Vo (pin3)=3.5V 4
PWM comparator input threshold voltage VTH 4 4.5 V Zero duty cycle 4
Input sink current (PWM comparator) II- 0.3 0.7 mA V (pin3)=0.7V 4
Dead-time control input bias current IIB(DT) -2 -10 µA Vin=0V~5.25V 4
Input threshold voltage (pin4), zero duty cycle VTH 3 3.3 V Zero duty cycle 4
Input threshold voltage (pin4), maximum duty cycle 0 4
Standard frequency offset fosc 3 % RT=30k; CT=0.001µF 5
Frequency variation with supply voltage fosc/V 0.1 % Vcc=7.0V~40V 5
Frequency variation with temperature fosc/T 12 % RT=12k; CT=0.01µF; Tamb=Tlow~Thigh 5
Low-current input (start control) ISTL -25 -200 µA V (pin3)=0.4V 5
High-current input (start control) ISTH 25 200 µA V (pin13)=2.4V 5
Standby supply current Icc 6 10 mA Vcc=15V; pin6 at Vref, other inputs and outputs open 5
Standby supply current Icc 9 15 mA Vcc=40V; pin6 at Vref, other inputs and outputs open 5
High-current input (start control), V(pin13)=Vref ISTH 75 µA V (pin13)=Vref 5
Maximum duty cycle (each output) DCmax 45 % Vin=0V; RT=12k; CT=0.1µF 4
Oscillation frequency fosc 10 kHz RT=12k; CT=0.01µF 5
Average supply current 7.5 mA Vcc=15V; RT=12k; CT=0.01µF; V (pin14)=2.0V 5

CAD (KiCad official)

  • Symbol: TL494IN
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: tl494in-etched.step / tl494in-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl494in.step / tl494in.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (12 pp, sha256 99e3d620b7c82bbd, retrieved 2026-10-15, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF