component

TL432

Public Made by Adom

by adom

Shikues Voltage Reference, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tl432: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json tl432: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 23h ago
README.md tl432: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
tl432-etched.fit.json tl432: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tl432-etched.glb tl432: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tl432-etched.step tl432: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tl432.glb Publish 0.1.0 · Ray 1mo ago
tl432.kicad_mod Publish 0.1.0 · Ray 1mo ago
tl432.kicad_sym Publish 0.1.0 · Ray 1mo ago
tl432.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 3 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
tl432.step Publish 0.1.0 · Ray 1mo ago

TL432

Shikues · Voltage Reference · SOT-23

TL432 from Shikues, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference input. Internally compared to the 1.24V bandgap reference; connect to the tap of the R1/R2 divider from cathode to anode to program the regulated cathode voltage per VKA = VREF*(1 + R1/R2) + R1*IREF. Input current typ ~200 nA.
2 A passive Anode. Return terminal of the shunt reference; typically connected to circuit ground. Sinks the cathode current (0.1 mA to 100 mA) that flows from cathode through the device.
3 K passive Cathode. Regulated node; pulled up through an external resistor to the supply. Maximum cathode voltage 18 V, continuous cathode current up to 100 mA; dynamic impedance ~0.5 Ω.

Key specifications

Parameter Value
Manufacturer Shikues
Package SOT-23
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: TL432
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tl432-etched.step / tl432-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl432.step / tl432.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tl432.step 59 KB You want the bare part, or you mark your own boards.
tl432-etched.step 918 KB You want the part with TL432 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 232 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shikues datasheet (5 pp, sha256 47a874c155cc2e03, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF