component
TL431CDR2G
Public Made by Adomby adom
onsemi Voltage References, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTL431CDR2G
onsemi · Voltage References · SOIC-8
TL431CDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Cathode | passive | Shunt regulator cathode, operating VKA from Vref to 36 V (37 V absolute max) with cathode current of 1.0 mA to 100 mA. |
| 2 | Anode | passive | Anode (lowest-potential terminal of the shunt regulator), electrically common to the die attach flag with pins 3, 6 and 7. |
| 3 | Anode | passive | Anode, electrically common to the die attach flag with pins 2, 6 and 7. |
| 4 | N/C | unconnected | No internal connection. |
| 5 | N/C | unconnected | No internal connection. |
| 6 | Anode | passive | Anode, electrically common to the die attach flag with pins 2, 3 and 7. |
| 7 | Anode | passive | Anode, electrically common to the die attach flag with pins 2, 3 and 6. |
| 8 | Reference | input | Reference input that sets the output via an external divider (VKA = Vref(1+R1/R2)+Iref*R1), with Vref of about 2.495 V and reference input current range of -0.05 to +10 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Input Voltage | Vref | 2.44 | 2.495 | 2.55 | V | VKA = Vref, IK = 10 mA, TA = 25°C | 3 |
| Reference Input Voltage over temperature | Vref | 2.423 | 2.567 | V | VKA = Vref, IK = 10 mA, TA = Tlow to Thigh (0°C to 70°C) | 3 | |
| Reference Input Voltage Tolerance | -2.2 | 2.2 | % | TL431CDR2G ordering table | 13 | ||
| Reference Input Voltage Deviation Over Temperature Range | ΔVref | 3 | 17 | mV | VKA = Vref, IK = 10 mA | 3 | |
| Ratio of Change in Vref to Change in VKA | ΔVref/ΔVKA | -1.4 | -2.7 | mV/V | IK = 10 mA, VKA = 10 V to Vref | 3 | |
| Ratio of Change in Vref to Change in VKA | ΔVref/ΔVKA | -1 | -2 | mV/V | IK = 10 mA, VKA = 36 V to 10 V | 3 | |
| Reference Input Current | Iref | 1.8 | 4 | µA | IK = 10 mA, R1 = 10 k, R2 = ∞, TA = 25°C | 3 | |
| Reference Input Current over temperature | Iref | 5.2 | µA | IK = 10 mA, R1 = 10 k, R2 = ∞, TA = Tlow to Thigh | 3 | ||
| Reference Input Current Deviation Over Temperature Range | ΔIref | 0.4 | 1.2 | µA | IK = 10 mA, R1 = 10 k, R2 = ∞ | 3 | |
| Minimum Cathode Current For Regulation | Imin | 0.5 | 1 | mA | VKA = Vref | 3 | |
| Off-State Cathode Current | Ioff | 20 | 1000 | nA | VKA = 36 V, Vref = 0 V | 3 | |
| Dynamic Impedance | /ZKA/ | 0.22 | 0.5 | Ω | VKA = Vref, IK = 1.0 mA to 100 mA, f ≤ 1.0 kHz | 3 | |
| Cathode to Anode Voltage (recommended) | VKA | 2.495 | 36 | V | Min printed as Vref | 2 | |
| Cathode Current (recommended) | IK | 1 | 100 | mA | 2 | ||
| Cathode to Anode Voltage (abs max) | VKA | 37 | V | 2 | |||
| Cathode Current Range, Continuous | IK | -100 | 150 | mA | 2 | ||
| Reference Input Current Range, Continuous | Iref | -0.05 | 10 | mA | 2 | ||
| Operating Junction Temperature | TJ | 150 | °C | 2 | |||
| Operating Ambient Temperature Range | TA | 0 | 70 | °C | TL431C | 2 | |
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 | ||
| Total Power Dissipation | PD | 0.7 | W | TA = 25°C, D suffix plastic package | 2 | ||
| Total Power Dissipation | PD | 1.5 | W | TC = 25°C, D suffix plastic package | 2 | ||
| ESD Human Body Model | HBM | 2000 | V | >2000, JESD22-A114F | 2 | ||
| ESD Machine Model | MM | 200 | V | >200, JESD22-A115C | 2 | ||
| ESD Charged Device Model | CDM | 500 | V | >500, JESD22-C101E | 2 | ||
| Thermal Resistance, Junction-to-Ambient | RθJA | 178 | °C/W | D, LP suffix package | 3 | ||
| Thermal Resistance, Junction-to-Case | RθJC | 83 | °C/W | D, LP suffix package | 3 | ||
| Equivalent Full-Range Temperature Coefficient | 50 | ppm/°C | 1 |
CAD (KiCad official)
- Symbol:
TL431CDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tl431cdr2g-etched.step/tl431cdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl431cdr2g.step/tl431cdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (18 pp, sha256
922e22f14c14db6a, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).